2021-10-06  Patrick Palka  <ppalka@redhat.com>

	Backported from master:
	2021-09-24  Patrick Palka  <ppalka@redhat.com>

	PR c++/98216
	PR c++/91292
	* real.c (encode_ieee_double): Avoid unwanted sign extension.
	(encode_ieee_quad): Likewise.

2021-10-05  Ilya Leoshkevich  <iii@linux.ibm.com>

	Backported from master:
	2021-07-16  Ilya Leoshkevich  <iii@linux.ibm.com>

	* config/s390/predicates.md (bras_sym_operand): Accept all
	functions in 64-bit mode, use UNSPEC_PLT31.
	(larl_operand): Use UNSPEC_PLT31.
	* config/s390/s390.c (s390_loadrelative_operand_p): Likewise.
	(legitimize_pic_address): Likewise.
	(s390_emit_tls_call_insn): Mark __tls_get_offset as function,
	use UNSPEC_PLT31.
	(s390_delegitimize_address): Use UNSPEC_PLT31.
	(s390_output_addr_const_extra): Likewise.
	(print_operand): Add @PLT to TLS calls, handle %K.
	(s390_function_profiler): Mark __fentry__/_mcount as function,
	use %K, use UNSPEC_PLT31.
	(s390_output_mi_thunk): Use only UNSPEC_GOT, use %K.
	(s390_emit_call): Use UNSPEC_PLT31.
	(s390_emit_tpf_eh_return): Mark __tpf_eh_return as function.
	* config/s390/s390.md (UNSPEC_PLT31): Rename from UNSPEC_PLT.
	(*movdi_64): Use %K.
	(reload_base_64): Likewise.
	(*sibcall_brc): Likewise.
	(*sibcall_brcl): Likewise.
	(*sibcall_value_brc): Likewise.
	(*sibcall_value_brcl): Likewise.
	(*bras): Likewise.
	(*brasl): Likewise.
	(*bras_r): Likewise.
	(*brasl_r): Likewise.
	(*bras_tls): Likewise.
	(*brasl_tls): Likewise.
	(main_base_64): Likewise.
	(reload_base_64): Likewise.
	(@split_stack_call<mode>): Likewise.

2021-10-05  Ilya Leoshkevich  <iii@linux.ibm.com>

	Backported from master:
	2021-06-24  Ilya Leoshkevich  <iii@linux.ibm.com>

	* config/s390/s390.c (s390_function_profiler): Ignore labelno
	parameter.
	* config/s390/s390.h (NO_PROFILE_COUNTERS): Define.

2021-10-04  Eric Botcazou  <ebotcazou@adacore.com>

	* config/rs6000/vxworks.h (TARGET_INIT_LIBFUNCS): Delete.

2021-10-01  John David Anglin  <danglin@gcc.gnu.org>

	PR debug/102373
	* config/pa/pa.c (pa_option_override): Default to dwarf version 4
	on hppa64-hpux.

2021-10-01  Eric Botcazou  <ebotcazou@adacore.com>

	* explow.c: Include langhooks.h.
	(set_stack_check_libfunc): Build a proper function type.

2021-10-01  Eric Botcazou  <ebotcazou@adacore.com>

	PR c++/64697
	* config/i386/i386.c (legitimate_pic_address_disp_p): For PE-COFF do
	not return true for external weak function symbols in medium model.

2021-09-29  Peter Bergner  <bergner@linux.ibm.com>

	Backported from master:
	2021-09-14  Peter Bergner  <bergner@linux.ibm.com>

	* config/rs6000/mma.md (unspec): Delete UNSPEC_MMA_XXSETACCZ.
	(unspecv): Add UNSPECV_MMA_XXSETACCZ.
	(*mma_xxsetaccz): Delete.
	(mma_xxsetaccz): Change to define_insn.  Remove operand 1.
	Use UNSPECV_MMA_XXSETACCZ.  Update comment.
	* config/rs6000/rs6000.c (rs6000_rtx_costs): Use UNSPECV_MMA_XXSETACCZ.

2021-09-28  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-09-28  Jakub Jelinek  <jakub@redhat.com>

	PR target/102498
	* config/i386/i386.c (standard_80387_constant_p): Don't recognize
	special 80387 instruction XFmode constants if flag_rounding_math.

2021-09-24  Feng Xue  <fxue@os.amperecomputing.com>

	PR tree-optimization/102400
	* tree-ssa-sccvn.c (vn_reference_insert_pieces): Initialize
	result_vdef to zero value.

2021-09-24  Feng Xue  <fxue@os.amperecomputing.com>

	PR tree-optimization/102451
	* tree-ssa-dse.c (delete_dead_or_redundant_call): Record bb of stmt
	before removal.

2021-09-22  Andreas Krebbel  <krebbel@linux.ibm.com>

	Backported from master:
	2021-09-22  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/tpf.md (prologue_tpf, epilogue_tpf): Add cc clobber.

2021-09-22  Andreas Krebbel  <krebbel@linux.ibm.com>

	Backported from master:
	2021-09-22  Andreas Krebbel  <krebbel@linux.ibm.com>

	PR target/102222
	* config/s390/s390.c (s390_expand_insv): Emit a normal move if it
	is actually a full copy of the source operand into the target.
	Don't emit a strict low part move if source and target mode match.

2021-09-22  Kewen Lin  <linkw@linux.ibm.com>

	* ipa-fnsummary.c (inline_read_section): Unpack a dummy bit
	to keep consistent with the side of streaming out.

2021-09-21  Segher Boessenkool  <segher@kernel.crashing.org>

	Backported from master:
	2021-09-08  Segher Boessenkool  <segher@kernel.crashing.org>

	PR target/102107
	* config/rs6000/rs6000-logue.c (rs6000_emit_epilogue): For ELFv2 use
	r11 instead of r12 for restoring CR.

2021-09-21  Segher Boessenkool  <segher@kernel.crashing.org>

	Backported from master:
	2021-09-03  Segher Boessenkool  <segher@kernel.crashing.org>

	PR target/102107
	* config/rs6000/rs6000-logue.c (rs6000_emit_prologue): On ELFv2 use r11
	instead of r12 for CR save, in all cases.

2021-09-17  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/102306
	* combine.c (try_combine): Abort the combination if we are about to
	duplicate volatile references.

2021-09-16  Daniel Cederman  <cederman@gaisler.com>

	* config/sparc/sparc-opts.h (enum sparc_processor_type): Add LEON5
	* config/sparc/sparc.c (struct processor_costs): Add LEON5 costs
	(leon5_adjust_cost): Increase cost of store with data dependency
	on ALU instruction and FPU anti-dependencies.
	(sparc_option_override): Add LEON5 costs
	(sparc_adjust_cost): Add LEON5 cost adjustments
	* config/sparc/sparc.h: Add LEON5
	* config/sparc/sparc.md: Include LEON5 scheduling information
	* config/sparc/sparc.opt: Add LEON5
	* doc/invoke.texi: Add LEON5
	* config/sparc/leon5.md: New file.

2021-09-16  Daniel Cederman  <cederman@gaisler.com>

	* config/sparc/sparc.md (stack_protect_setsi): Add NOP to prevent
	sensitive sequence for B2BST errata workaround.

2021-09-16  Daniel Cederman  <cederman@gaisler.com>

	* config/sparc/sparc.c (sparc_do_work_around_errata): Do not begin
	functions with atomic instruction in the UT700 errata workaround.

2021-09-16  Daniel Cederman  <cederman@gaisler.com>

	* config/sparc/sparc.c (next_active_non_empty_insn): New function
	that returns next active non empty assembly instruction.
	(sparc_do_work_around_errata): Use new function.

2021-09-16  Daniel Cederman  <cederman@gaisler.com>

	* config/sparc/sparc.c (store_insn_p): Add predicate for store
	attributes.
	(load_insn_p): Add predicate for load attributes.
	(sparc_do_work_around_errata): Use new predicates.

2021-09-16  Andreas Larsson  <andreas@gaisler.com>

	* config/sparc/sparc.c (dump_target_flag_bits): Print bit names for
	LEON and LEON3.

2021-09-16  Andrew Pinski  <apinski@marvell.com>

	Backported from master:
	2021-09-01  Andrew Pinski  <apinski@marvell.com>

	PR target/101934
	* config/aarch64/aarch64.c (aarch64_expand_setmem):
	Check STRICT_ALIGNMENT before creating an overlapping
	store.

2021-09-15  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-09-15  Jakub Jelinek  <jakub@redhat.com>

	PR c++/88578
	PR c++/102295
	* varasm.c (output_constructor_regular_field): Instead of assertion
	that array_size_for_constructor result is equal to size of
	TREE_TYPE (local->val) in bytes, assert that the type size is greater
	or equal to array_size_for_constructor result and use type size as
	fieldsize.

2021-09-15  Pat Haugen  <pthaugen@linux.ibm.com>

	* config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Add
	OPTION_MASK_P10_FUSION_2STORE.
	(POWERPC_MASKS): Likewise.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Enable
	store fusion for Power10.
	(is_fusable_store): New.
	(power10_sched_reorder): Likewise.
	(rs6000_sched_reorder): Do Power10 specific reordering.
	(rs6000_sched_reorder2): Likewise.
	* config/rs6000/rs6000.opt: Add new option.

2021-09-15  Peter Bergner  <bergner@linux.ibm.com>

	Backported from master:
	2021-07-14  Peter Bergner  <bergner@linux.ibm.com>

	* config/rs6000/rs6000.c (adjacent_mem_locations): Return the lower
	addressed memory rtx, if any.
	(rs6000_split_multireg_move): Fix code formatting.
	Handle MMA build built-ins with operands in adjacent memory locations.

2021-09-15  Peter Bergner  <bergner@linux.ibm.com>

	Backported from master:
	2021-07-14  Peter Bergner  <bergner@linux.ibm.com>

	* config/rs6000/rs6000.c (rs6000_split_multireg_move): Move to later
	in the file.

2021-09-14  Pat Haugen  <pthaugen@linux.ibm.com>

	* config/rs6000/rs6000.c (is_load_insn1): Verify destination is a
	register.
	(is_store_insn1): Verify source is a register.

2021-09-14  Xionghu Luo  <luoxhu@linux.ibm.com>

	PR target/97142
	* config/rs6000/rs6000.md (fmod<mode>3): New define_expand.
	(remainder<mode>3): Likewise.

2021-09-08  Jonathan Wakely  <jwakely@redhat.com>

	Backported from master:
	2021-09-08  Jonathan Wakely  <jwakely@redhat.com>

	PR c++/60318
	* doc/trouble.texi (Copy Assignment): Fix description of
	behaviour and fix code in example.

2021-09-08  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-09-08  Jakub Jelinek  <jakub@redhat.com>

	PR target/102224
	* config/i386/i386.md (xorsign<mode>3): If operands[1] is equal to
	operands[2], emit abs<mode>2 instead.
	(@xorsign<mode>3_1): Add early-clobber for output operand.

2021-09-07  Max Filippov  <jcmvbkbc@gmail.com>

	Backported from master:
	2021-09-07  Takayuki 'January June' Suwa  <jjsuwa_sys3175@yahoo.co.jp>

	PR target/102115
	* config/xtensa/xtensa.c (xtensa_emit_move_sequence): Add
	'CONST_INT_P (src)' to the condition of the block that tries to
	eliminate literal when loading integer contant.

2021-09-06  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-08-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/102046
	* tree-vect-slp.c (vect_build_slp_tree_2): Conservatively
	update ->any_pattern when swapping operands.

2021-09-06  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-08-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/101925
	* tree-ssa-sccvn.c (copy_reference_ops_from_ref): Set
	reverse on COMPONENT_REF and ARRAY_REF according to
	what reverse_storage_order_for_component_p does.
	(vn_reference_eq): Compare reversed on reference ops.
	(reverse_storage_order_for_component_p): New overload.
	(vn_reference_lookup_3): Check reverse_storage_order_for_component_p
	on the reference looked up.

2021-09-06  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-08-10  Richard Biener  <rguenther@suse.de>

	PR middle-end/101824
	* tree-nested.c (get_frame_field): Mark the COMPONENT_REF as
	volatile in case the variable was.

2021-09-03  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/altivec.md (UNSPEC_XXSPLTIDP): Rename from
	UNSPEC_XXSPLTID.
	(xxspltidp_v2df): Likewise.
	(xxspltidp_v2df_inst): Likewise.

2021-09-03  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/altivec.md (xxspltiw_v4si): Use vecperm type
	attribute.  Backport from master, 2021-08-24.
	(xxspltiw_v4si_inst): Likewise.
	(xxspltiw_v4sf_inst): Likewise.
	(xxspltidp_v2df): Likewise.
	(xxspltidp_v2df_inst): Likewise.
	(xxsplti32dx_v4si): Likewise.
	(xxsplti32dx_v4si_inst): Likewise.
	(xxsplti32dx_v4sf_inst): Likewise.
	(xxblend_<mode>): Likewise.
	(xxpermx): Likewise.
	(xxpermx_inst): Likewise.
	(xxeval): Likewise.

2021-09-03  liuhongt  <hongtao.liu@intel.com>

	PR target/102166
	* config/i386/amxbf16intrin.h : Remove macro check for __AMX_BF16__.
	* config/i386/amxint8intrin.h : Remove macro check for __AMX_INT8__.
	* config/i386/amxtileintrin.h : Remove macro check for __AMX_TILE__.

2021-09-02  Peter Bergner  <bergner@linux.ibm.com>

	Backported from master:
	2021-08-19  Peter Bergner  <bergner@linux.ibm.com>

	PR target/101849
	* config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Cast
	pointer to __vector_pair *.

2021-09-01  Marek Polacek  <polacek@redhat.com>
	    Jakub Jelinek  <jakub@redhat.com>

	PR c++/101592
	* fold-const.c (make_range_step): Return NULL_TREE for NULLPTR_TYPE.

2021-09-01  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-09-01  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/102124
	* tree-vect-patterns.c (vect_recog_widen_op_pattern): For ORIG_CODE
	MINUS_EXPR, if itype is unsigned with smaller precision than type,
	add an extra cast to signed variant of itype to ensure sign-extension.

2021-08-31  Thomas Schwinge  <thomas@codesourcery.com>

	Backported from master:
	2021-08-31  Thomas Schwinge  <thomas@codesourcery.com>

	* tree.c (walk_tree_1) <OMP_CLAUSE_TILE>: Handle three operands.

2021-08-30  Haochen Gui  <guihaoc@gcc.gnu.org>

	Backported from master:
	2021-06-04  Haochen Gui  <guihaoc@gcc.gnu.org>

	* config/rs6000/rs6000-call.c (rs6000_promote_function_mode):
	Replace PROMOTE_MODE marco with its content.

2021-08-30  Haochen Gui  <guihaoc@gcc.gnu.org>

	Backported from master:
	2021-06-04  Haochen Gui  <guihaoc@gcc.gnu.org>

	* config/rs6000/rs6000.h (PROMOTE_MODE): Remove.

2021-08-27  konglin1  <lingling.kong@intel.com>

	PR target/101472
	* config/i386/sse.md: (<avx512>scattersi<mode>): Add mask operand to
	UNSPEC_VSIBADDR.
	(<avx512>scattersi<mode>): Likewise.
	(*avx512f_scattersi<VI48F:mode>): Merge mask operand to set_dest.
	(*avx512f_scatterdi<VI48F:mode>): Likewise

2021-08-25  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2021-08-05  H.J. Lu  <hjl.tools@gmail.com>

	PR target/99744
	* config/i386/i386.c (ix86_can_inline_p): Ignore MASK_80387 if
	callee only uses GPRs.
	* config/i386/ia32intrin.h: Revert commit 5463cee2770.
	* config/i386/serializeintrin.h: Revert commit 71958f740f1.
	* config/i386/x86gprintrin.h: Add
	#pragma GCC target("general-regs-only") and #pragma GCC pop_options
	to disable non-GPR ISAs.

2021-08-25  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2021-07-18  H.J. Lu  <hjl.tools@gmail.com>

	PR target/101492
	* common/config/i386/i386-common.c (ix86_handle_option): For
	-mgeneral-regs-only, enable the GPR only instructions which are
	enabled implicitly by SSE ISAs unless they have been disabled
	explicitly.

2021-08-25  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2021-07-21  H.J. Lu  <hjl.tools@gmail.com>

	PR target/101549
	* config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_SSE4_2
	from CRC32 _builtin functions.

2021-08-25  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2021-04-20  H.J. Lu  <hjl.tools@gmail.com>

	* config/i386/i386-c.c (ix86_target_macros_internal): Define
	__CRC32__ for -mcrc32.
	* config/i386/i386-options.c (ix86_option_override_internal):
	Enable crc32 instruction for -msse4.2.
	* config/i386/i386.md (sse4_2_crc32<mode>): Remove TARGET_SSE4_2
	check.
	(sse4_2_crc32di): Likewise.
	* config/i386/ia32intrin.h: Use crc32 target option for CRC32
	intrinsics.

2021-08-25  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2021-04-21  H.J. Lu  <hjl.tools@gmail.com>

	* config.gcc: Install mwaitintrin.h for i[34567]86-*-* and
	x86_64-*-* targets.
	* lto-streamer.h (LTO_minor_version): Bump.
	* common/config/i386/i386-common.c (OPTION_MASK_ISA2_MWAIT_SET):
	New.
	(OPTION_MASK_ISA2_MWAIT_UNSET): Likewise.
	(ix86_handle_option): Handle -mmwait.
	* config/i386/i386-builtins.c (ix86_init_mmx_sse_builtins):
	Replace OPTION_MASK_ISA_SSE3 with OPTION_MASK_ISA2_MWAIT on
	__builtin_ia32_monitor and __builtin_ia32_mwait.
	* config/i386/i386-options.c (isa2_opts): Add -mmwait.
	(ix86_valid_target_attribute_inner_p): Likewise.
	(ix86_option_override_internal): Enable mwait/monitor
	instructions for -msse3.
	* config/i386/i386.h (TARGET_MWAIT): New.
	(TARGET_MWAIT_P): Likewise.
	* config/i386/i386.opt: Add -mmwait.
	* config/i386/mwaitintrin.h: New file.
	* config/i386/pmmintrin.h: Include <mwaitintrin.h>.
	* config/i386/sse.md (sse3_mwait): Replace TARGET_SSE3 with
	TARGET_MWAIT.
	(@sse3_monitor_<mode>): Likewise.
	* config/i386/x86gprintrin.h: Include <mwaitintrin.h>.
	* doc/extend.texi: Document mwait target attribute.
	* doc/invoke.texi: Document -mmwait.

2021-08-25  konglin1  <lingling.kong@intel.com>

	PR target/101471
	* config/i386/avx512dqintrin.h (_mm512_fpclass_ps_mask): Fix
	macro define in O0.
	(_mm512_mask_fpclass_ps_mask): Ditto.

2021-08-24  Richard Earnshaw  <rearnsha@arm.com>

	Backported from master:
	2021-08-24  Richard Earnshaw  <rearnsha@arm.com>

	PR target/102035
	* config/arm/arm.md (attribute arch): Add fix_vlldm.
	(arch_enabled): Use it.
	* config/arm/vfp.md (lazy_store_multiple_insn): Add alternative to
	use when erratum mitigation is needed.

2021-08-24  Richard Earnshaw  <rearnsha@arm.com>

	Backported from master:
	2021-08-24  Richard Earnshaw  <rearnsha@arm.com>

	PR target/102035
	* config/arm/arm.opt (mfix-cmse-cve-2021-35465): New option.
	* doc/invoke.texi (Arm Options): Document it.
	* config/arm/arm-cpus.in (quirk_vlldm): New feature bit.
	(ALL_QUIRKS): Add quirk_vlldm.
	(cortex-m33): Add quirk_vlldm.
	(cortex-m35p, cortex-m55): Likewise.
	* config/arm/arm.c (arm_option_override): Enable fix_vlldm if
	targetting an affected CPU and not explicitly controlled on
	the command line.

2021-08-24  Richard Earnshaw  <rearnsha@arm.com>

	Backported from master:
	2021-08-24  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/vfp.md (lazy_store_multiple_insn): Rewrite as valid RTL.
	(lazy_load_multiple_insn): Likewise.

2021-08-24  Jan Hubicka  <hubicka@ucw.cz>

	Backported from master:
	2021-08-23  Jan Hubicka  <hubicka@ucw.cz>

	PR middle-end/101949
	* ipa-modref.c (analyze_ssa_name_flags): Fix merging of
	EAF_NOCLOBBER

2021-08-24  Jan Hubicka  <jh@suse.cz>

	Backported from master:
	2021-08-22  Jan Hubicka  <hubicka@ucw.cz>
		    Martin Liska  <mliska@suse.cz>

	PR middle-end/101949
	* ipa-modref.c (analyze_ssa_name_flags): Indirect call implies
	~EAF_NOCLOBBER.

2021-08-24  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-08-23  Richard Biener  <rguenther@suse.de>

	PR ipa/97565
	* tree-ssa-structalias.c (ipa_pta_execute): Check in_other_partition
	in addition to has_gimple_body.

2021-08-23  Christophe Lyon  <christophe.lyon@foss.st.com>

	Backported from master:
	2021-08-23  Christophe Lyon  <christophe.lyon@foss.st.com>

	* config/arm/arm_mve.h: Fix __arm_vctp16q return type.

2021-08-23  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-08-23  Jakub Jelinek  <jakub@redhat.com>

	PR debug/101905
	* dwarf2out.c (gen_variable_die): Add DW_AT_location for global
	register variables already during early_dwarf if possible.

2021-08-23  Martin Liska  <mliska@suse.cz>

	Backported from master:
	2021-08-20  Martin Liska  <mliska@suse.cz>

	PR gcov-profile/89961
	* gcov.c (make_gcov_file_name): Rewrite using std::string.
	(mangle_name): Simplify, do not used the second argument.
	(strip_extention): New function.
	(get_md5sum): Likewise.
	(get_gcov_intermediate_filename): Handle properly -p and -x
	options.
	(output_gcov_file): Use string type.
	(generate_results): Likewise.
	(md5sum_to_hex): Remove.

2021-08-18  Richard Earnshaw  <rearnsha@arm.com>

	Backported from master:
	2021-08-05  Richard Earnshaw  <rearnsha@arm.com>

	PR target/101723
	* config/arm/arm-cpus.in (generic-armv7-a): Add quirk to suppress
	writing .cpu directive in asm output.
	* config/arm/arm.c (arm_identify_fpu_from_isa): New variable.
	(arm_last_printed_arch_string): Delete.
	(arm_last-printed_fpu_string): Delete.
	(arm_configure_build_target): If use of floating-point/SIMD is
	disabled, remove all fp/simd related features from the target ISA.
	(last_arm_targ_options): New variable.
	(arm_print_asm_arch_directives): Add new parameters.  Change order
	of emitted directives and handle all cases here.
	(arm_file_start): Always call arm_print_asm_arch_directives, move
	all generation of .arch/.arch_extension here.
	(arm_file_end): Call arm_print_asm_arch.
	(arm_declare_function_name): Call arm_print_asm_arch_directives
	instead of printing .arch/.fpu directives directly.

2021-08-18  Richard Earnshaw  <rearnsha@arm.com>

	Backported from master:
	2021-08-05  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm.c (arm_configure_build_target): Don't call
	arm_option_reconfigure_globals.
	(arm_option_restore): Call arm_option_reconfigure_globals after
	reconfiguring the target.
	* config/arm/arm-c.c (arm_pragma_target_parse): Likewise.

2021-08-18  Richard Earnshaw  <rearnsha@arm.com>

	Backported from master:
	2021-08-05  Richard Earnshaw  <rearnsha@arm.com>

	* config/arm/arm.c (arm_configure_build_target): Ensure the target's
	arch_name is always set.

2021-08-17  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/101373
	PR tree-optimization/101868
	* tree-ssa-pre.c (prune_clobbered_mems): Also prune trapping
	references when the BB may not return.

2021-08-16  Eric Botcazou  <ebotcazou@gcc.gnu.org>

	* dwarf2out.c (add_scalar_info): Deal with DW_AT_data_bit_offset.

2021-08-16  Martin Liska  <mliska@suse.cz>

	PR ipa/100600
	* ipa-icf-gimple.c (func_checker::compare_ssa_name): Do not
	  consider equal SSA_NAMEs when one is a param.

2021-08-16  Martin Liska  <mliska@suse.cz>

	PR ipa/101261
	* symtab.c (symtab_node::noninterposable_alias): Do not create
	  local aliases for target_clone functions as the clonning pass
	  rejects aliases.

2021-08-16  Martin Liska  <mliska@suse.cz>

	PR ipa/101726
	* multiple_target.c (create_dispatcher_calls): Make default
	  function local only if it is a definition.

2021-08-16  Martin Liska  <mliska@suse.cz>

	PR c/100150
	* lto-streamer.h (LTO_minor_version): Bump.

2021-08-13  Martin Liska  <mliska@suse.cz>

	PR gcov-profile/100788
	* coverage.c (coverage_begin_function): Update function
	  beginning when #line macro is used.

2021-08-12  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-07-28  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/101624
	* ubsan.c (maybe_instrument_pointer_overflow,
	instrument_object_size): Only test DECL_REGISTER on VAR_DECLs,
	PARM_DECLs or RESULT_DECLs.
	* sanopt.c (maybe_optimize_ubsan_ptr_ifn): Likewise.

2021-08-12  Eric Botcazou  <ebotcazou@gcc.gnu.org>

	* configure.ac (PE linker --disable-dynamicbase support): New check.
	* configure: Regenerate.
	* config.in: Likewise.
	* config/i386/mingw32.h (LINK_SPEC_DISABLE_DYNAMICBASE): New define.
	(LINK_SPEC): Use it.
	* config/i386/mingw-w64.h (LINK_SPEC_DISABLE_DYNAMICBASE): Likewise.
	(LINK_SPEC): Likewise.

2021-08-06  Richard Sandiford  <richard.sandiford@arm.com>

	Backported from master:
	2021-08-03  Richard Sandiford  <richard.sandiford@arm.com>

	* doc/invoke.texi: Document -mtune=neoverse-512tvb and
	-mcpu=neoverse-512tvb.
	* config/aarch64/aarch64-cores.def (neoverse-512tvb): New entry.
	* config/aarch64/aarch64-tune.md: Regenerate.
	* config/aarch64/aarch64.c (neoverse512tvb_sve_vector_cost)
	(neoverse512tvb_sve_issue_info, neoverse512tvb_vec_issue_info)
	(neoverse512tvb_vector_cost, neoverse512tvb_tunings): New structures.
	(aarch64_adjust_body_cost_sve): Handle -mtune=neoverse-512tvb.
	(aarch64_adjust_body_cost): Likewise.

2021-08-06  Richard Sandiford  <richard.sandiford@arm.com>

	Backported from master:
	2021-08-03  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.c (aarch64_add_stmt_cost): Only
	record issue information for operations that occur in the
	innermost loop.

2021-08-06  Richard Sandiford  <richard.sandiford@arm.com>

	Backported from master:
	2021-08-03  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.c (aarch64_multiply_add_p): Add a vec_flags
	parameter.  Detect cases in which an Advanced SIMD MLA would almost
	certainly require a MOV.
	(aarch64_count_ops): Update accordingly.

2021-08-06  Richard Sandiford  <richard.sandiford@arm.com>

	Backported from master:
	2021-08-03  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.c (aarch64_is_store_elt_extraction): New
	function, split out from...
	(aarch64_detect_vector_stmt_subtype): ...here.
	(aarch64_add_stmt_cost): Treat extracting element 0 as free.

2021-08-06  Richard Sandiford  <richard.sandiford@arm.com>

	Backported from master:
	2021-08-03  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-protos.h (sve_vec_cost):
	Add gather_load_x32_cost and gather_load_x64_cost.
	* config/aarch64/aarch64.c (generic_sve_vector_cost)
	(a64fx_sve_vector_cost, neoversev1_sve_vector_cost): Update
	accordingly, using the values given by the scalar_load * number
	of elements calculation that we used previously.
	(aarch64_detect_vector_stmt_subtype): Use the new fields.

2021-08-06  Richard Sandiford  <richard.sandiford@arm.com>

	Backported from master:
	2021-08-03  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.c (aarch64_adjust_body_cost_sve): New
	function, split out from...
	(aarch64_adjust_body_cost): ...here.

2021-08-06  Richard Sandiford  <richard.sandiford@arm.com>

	Backported from master:
	2021-08-03  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/fractional-cost.h: New file.
	* config/aarch64/aarch64.c: Include <algorithm> (indirectly)
	and cost_fraction.h.
	(vec_cost_fraction): New typedef.
	(aarch64_detect_scalar_stmt_subtype): Use it for statement costs.
	(aarch64_detect_vector_stmt_subtype): Likewise.
	(aarch64_sve_adjust_stmt_cost, aarch64_adjust_stmt_cost): Likewise.
	(aarch64_estimate_min_cycles_per_iter): Use vec_cost_fraction
	for cycle counts.
	(aarch64_adjust_body_cost): Likewise.
	(aarch64_test_cost_fraction): New function.
	(aarch64_run_selftests): Call it.

2021-08-06  Richard Sandiford  <richard.sandiford@arm.com>

	Backported from master:
	2021-08-03  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-protos.h (tune_params::sve_width): Turn
	into a bitmask.
	* config/aarch64/aarch64.c (aarch64_cmp_autovec_modes): Update
	accordingly.
	(aarch64_estimated_poly_value): Likewise.  Use the least significant
	set bit for the minimum and likely values.  Use the most significant
	set bit for the maximum value.

2021-08-06  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-07-19  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/101505
	* tree-vect-patterns.c (vect_determine_precisions): Walk
	PHIs also for loop vectorization.

2021-08-02  Haochen Gui  <guihaoc@gcc.gnu.org>

	Backported from master:
	2021-07-23  Haochen Gui  <guihaoc@gcc.gnu.org>

	PR target/100952
	* config/rs6000/rs6000.md (cstore<mode>4): Fix wrong fall through.

2021-07-30  Xi Ruoyao  <xry111@mengyan1223.wang>

	Backported from master:
	2021-07-30  Xi Ruoyao  <xry111@mengyan1223.wang>

	PR target/94780
	* config/mips/mips.c (mips_atomic_assign_expand_fenv): Use
	  TARGET_EXPR instead of MODIFY_EXPR.

2021-07-30  Xi Ruoyao  <xry111@mengyan1223.wang>

	Backported from master:
	2021-07-30  Xi Ruoyao  <xry111@mengyan1223.wang>

	PR target/101132
	* config/mips/mips-protos.h (mips_expand_vec_cmp_expr): Declare.
	* config/mips/mips.c (mips_expand_vec_cmp_expr): New function.
	* config/mips/mips-msa.md (vec_cmp<MSA:mode><mode_i>): New
	  expander.
	  (vec_cmpu<IMSA:mode><mode_i>): New expander.

2021-07-28  Martin Uecker  <muecker@gwdg.de>

	* calls.c (maybe_warn_rdwr_sizes): Correct argument
	numbers in warning that were switched.

2021-07-28  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-07-27  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/101586
	* gimple-fold.c (clear_padding_type): Ignore FIELD_DECLs with byte
	positions above or equal to sz except for diagnostics of flexible
	array members.

2021-07-28  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-07-23  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/101562
	* expmed.c (store_integral_bit_field): Only use movstrict_optab
	if the operand isn't paradoxical.

2021-07-28  Release Manager

	* GCC 11.2.0 released.

2021-07-21  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-07-21  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/101535
	* gimplify.c (omp_check_private): Properly skip ORT_TARGET_DATA
	contexts in which decl isn't privatized and for ORT_TARGET return
	false if decl is mapped.

2021-07-20  Jakub Jelinek  <jakub@redhat.com>

	PR target/101384
	* config/rs6000/rs6000.c (vspltis_constant): Accept EASY_VECTOR_MSB
	only if step and copies are equal to 1.

2021-07-20  Iain Sandoe  <iain@sandoe.co.uk>

	Backported from master:
	2021-07-06  Iain Sandoe  <iain@sandoe.co.uk>

	PR bootstrap/100246
	* config/i386/i386.h (struct stringop_algs): Define a CTOR for
	this type.

2021-07-20  Iain Sandoe  <iain@sandoe.co.uk>

	Backported from master:
	2021-07-09  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/100152
	* config/i386/i386-expand.c (ix86_expand_call): If a call is
	to a non-local-binding, or local but to a public symbol, then
	assume that it might be indirected via the lazy symbol binder.
	Mark R10 and R10 as clobbered in that case.

2021-07-20  Uroš Bizjak  <ubizjak@gmail.com>

	PR target/100182
	* config/i386/sync.md (define_peephole2 atomic_storedi_fpu):
	Remove.
	(define_peephole2 atomic_loaddi_fpu): Ditto.

2021-07-19  Bill Schmidt  <wschmidt@linux.ibm.com>

	PR target/101129
	* config/rs6000/rs6000-p8swap.c (has_part_mult): New.
	(rs6000_analyze_swaps): Insns containing a subreg of a mult are
	not swappable.

2021-07-18  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-07-01  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/94366
	* omp-low.c (lower_rec_input_clauses): Rename is_fp_and_or to
	is_truth_op, set it for TRUTH_*IF_EXPR regardless of new_var's type,
	use boolean_type_node instead of integer_type_node as NE_EXPR type.
	(lower_reduction_clauses): Likewise.

2021-07-18  Tobias Burnus  <tobias@codesourcery.com>

	Backported from master:
	2021-05-04  Tobias Burnus  <tobias@codesourcery.com>

	* omp-low.c (lower_rec_input_clauses, lower_reduction_clauses): Handle
	&& and || with floating-point and complex arguments.

2021-07-18  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-07-14  Jakub Jelinek  <jakub@redhat.com>

	PR go/101407
	* godump.c (godump_str_hash): New type.
	(godump_container::pot_dummy_types): Use string_hash instead of
	ptr_hash in the hash_set.

2021-07-18  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-07-01  Jakub Jelinek  <jakub@redhat.com>

	PR debug/101266
	* dwarf2out.c (loc_list_from_tree_1): Handle COMPOUND_LITERAL_EXPR.

2021-07-18  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-06-29  Jakub Jelinek  <jakub@redhat.com>

	PR c++/101210
	* match.pd ((intptr_t)x eq/ne CST to x eq/ne (typeof x) CST): Don't
	perform the optimization in GENERIC when sanitizing and x has a
	reference type.

2021-07-18  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-06-24  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/101172
	* stor-layout.c (finish_bitfield_representative): If nextf has
	error_mark_node type, set repr type to error_mark_node too.

2021-07-15  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2021-06-13  H.J. Lu  <hjl.tools@gmail.com>

	PR target/101023
	* config/i386/i386.c (ix86_expand_prologue): Set red_zone_used
	to true if red zone is used.
	(ix86_output_indirect_jmp): Replace ix86_red_zone_size with
	ix86_red_zone_used.
	* config/i386/i386.h (machine_function): Add red_zone_used.
	(ix86_red_zone_size): Removed.
	(ix86_red_zone_used): New.
	* config/i386/i386.md (peephole2 patterns): Replace
	ix86_red_zone_size with ix86_red_zone_used.

2021-07-15  H.J. Lu  <hjl.tools@gmail.com>

	Backported from master:
	2021-07-14  H.J. Lu  <hjl.tools@gmail.com>

	PR target/101395
	* config/i386/driver-i386.c (host_detect_local_cpu): Check
	"arch [32|64]" and "tune [32|64]" for 32-bit and 64-bit codegen.
	Enable UINTR only for 64-bit codegen.
	* config/i386/i386-options.c
	(ix86_option_override_internal::DEF_PTA): Skip PTA_UINTR if not
	in 64-bit mode.
	* config/i386/i386.h (ARCH_ARG): New.
	(CC1_CPU_SPEC): Pass "[arch|tune] 32" for 32-bit codegen and
	"[arch|tune] 64" for 64-bit codegen.

2021-07-15  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-07-15  Richard Biener  <rguenther@suse.de>

	PR driver/101383
	* gcc.c (process_command): Process -gtoggle like process_options
	would after parsing options.

2021-07-14  Andrew MacLeod  <amacleod@redhat.com>

	Backported from master:
	2021-07-02  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/101223
	* range-op.cc (build_lt): Add -1 for signed values.
	(built_gt): Subtract -1 for signed values.

2021-07-14  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/101148
	PR tree-optimization/101014
	* gimple-range-cache.cc (ranger_cache::ranger_cache): Adjust.
	(ranger_cache::~ranger_cache): Adjust.
	(ranger_cache::block_range): Check if propagation disallowed.
	(ranger_cache::propagate_cache): Disallow propagation if new value
	can't be stored properly.
	* gimple-range-cache.h (ranger_cache::m_propfail): New member.

2021-07-14  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (class ssa_block_ranges): Adjust prototype.
	(sbr_vector::set_bb_range): Return true.
	(class sbr_sparse_bitmap): Adjust.
	(sbr_sparse_bitmap::set_bb_range): Return value.
	(block_range_cache::set_bb_range): Return value.
	(ranger_cache::propagate_cache): Use return value to print msg.
	* gimple-range-cache.h (class block_range_cache): Adjust.

2021-07-14  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ranger_cache::push_poor_value): Disable
	poor value processing.

2021-07-14  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range.cc (gimple_ranger::range_of_expr): Treat debug statments
	as contextless queries to avoid additional lookups.

2021-07-14  Andrew MacLeod  <amacleod@redhat.com>

	Backported from master:
	2021-06-07  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/100299
	* gimple-range-cache.cc (class sbr_sparse_bitmap): New.
	(sbr_sparse_bitmap::sbr_sparse_bitmap): New.
	(sbr_sparse_bitmap::bitmap_set_quad): New.
	(sbr_sparse_bitmap::bitmap_get_quad): New.
	(sbr_sparse_bitmap::set_bb_range): New.
	(sbr_sparse_bitmap::get_bb_range): New.
	(sbr_sparse_bitmap::bb_range_p): New.
	(block_range_cache::block_range_cache): initialize bitmap obstack.
	(block_range_cache::~block_range_cache): Destruct obstack.
	(block_range_cache::set_bb_range): Decide when to utilze the
	sparse on entry cache.
	* gimple-range-cache.h (block_range_cache): Add bitmap obstack.
	* params.opt (-param=evrp-sparse-threshold): New.

2021-07-14  Andrew MacLeod  <amacleod@redhat.com>

	Backported from master:
	2021-06-07  Andrew MacLeod  <amacleod@redhat.com>

	* bitmap.c (bitmap_set_aligned_chunk): New.
	(bitmap_get_aligned_chunk): New.
	(test_aligned_chunk): New.
	(bitmap_c_tests): Call test_aligned_chunk.
	* bitmap.h (bitmap_set_aligned_chunk, bitmap_get_aligned_chunk): New.

2021-07-14  Andrew MacLeod  <amacleod@redhat.com>

	Backported from master:
	2021-05-07  Andrew MacLeod  <amacleod@redhat.com>

	* gimple-range-cache.cc (ssa_block_ranges): Virtualize.
	(sbr_vector): Renamed from ssa_block_cache.
	(sbr_vector::sbr_vector): Allocate from obstack abd initialize.
	(ssa_block_ranges::~ssa_block_ranges): Remove.
	(sbr_vector::set_bb_range): Use varying and undefined cached values.
	(ssa_block_ranges::set_bb_varying): Remove.
	(sbr_vector::get_bb_range): Adjust assert.
	(sbr_vector::bb_range_p): Adjust assert.
	(~block_range_cache): No freeing loop required.
	(block_range_cache::get_block_ranges): Remove.
	(block_range_cache::set_bb_range): Inline get_block_ranges.
	(block_range_cache::set_bb_varying): Remove.
	* gimple-range-cache.h (set_bb_varying): Remove prototype.
	* value-range.h (irange_allocator::get_memory): New.

2021-07-14  Michael Meissner  <meissner@linux.ibm.com>

	PR target/100809
	* config/rs6000/rs6000.md (udivti3): New insn.
	(divti3): New insn.
	(umodti3): New insn.
	(modti3): New insn.

2021-07-14  Alexandre Oliva  <oliva@adacore.com>

	Backported from master:
	2021-07-14  Alexandre Oliva  <oliva@adacore.com>

	* tree-ssa-alias.c (attr_fnspec::verify): Fix index in
	non-'t'-sized arg check.

2021-07-14  liuhongt  <hongtao.liu@intel.com>

	PR target/101185
	* config/i386/i386.c (x86_order_regs_for_local_alloc):
	Revert r12-1669.

2021-07-14  liuhongt  <hongtao.liu@intel.com>

	PR target/101142
	* config/i386/i386.md: (*anddi_1): Disparage slightly the mask
	register alternative.
	(*and<mode>_1): Ditto.
	(*andqi_1): Ditto.
	(*andn<mode>_1): Ditto.
	(*<code><mode>_1): Ditto.
	(*<code>qi_1): Ditto.
	(*one_cmpl<mode>2_1): Ditto.
	(*one_cmplsi2_1_zext): Ditto.
	(*one_cmplqi2_1): Ditto.
	* config/i386/i386.c (x86_order_regs_for_local_alloc): Change
	the order of mask registers to be before general registers.

2021-07-14  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-07-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/101445
	* tree-vect-stmts.c (vectorizable_load): Do the gap adjustment
	of the IV in the correct direction for negative stride
	accesses.

2021-07-13  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-07-05  Richard Biener  <rguenther@suse.de>

	PR middle-end/101291
	* cfgloopmanip.c (loop_version): Set the loop copy of the
	versioned loop to the new loop.

2021-07-13  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-07-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/101394
	* tree-ssa-pre.c (do_pre_regular_insertion): Avoid inserting
	copies from abnormals for a full redundancy.

2021-07-13  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-07-12  Richard Biener  <rguenther@suse.de>

	PR middle-end/101423
	* gimple.c (gimple_could_trap_p_1): Internal function calls
	do not trap.
	* tree-eh.c (tree_could_trap_p): Likewise.

2021-07-13  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-07-01  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100778
	* tree-vect-slp.c (vect_schedule_slp_node): Do not place trapping
	vectorized ops ahead of their scalar BB.

2021-07-13  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-05-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100778
	* tree-vect-slp.c (vect_build_slp_tree_1): Prevent possibly
	trapping ops in different BBs.

2021-07-09  Martin Jambor  <mjambor@suse.cz>

	Backported from master:
	2021-07-08  Martin Jambor  <mjambor@suse.cz>

	PR ipa/101066
	* ipa-sra.c (class isra_call_summary): New member
	m_before_any_store, initialize it in the constructor.
	(isra_call_summary::dump): Dump the new field.
	(ipa_sra_call_summaries::duplicate): Copy it.
	(process_scan_results): Set it.
	(isra_write_edge_summary): Stream it.
	(isra_read_edge_summary): Likewise.
	(param_splitting_across_edge): Only override
	safe_to_import_accesses if m_before_any_store is set.

2021-07-09  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/101377
	* gcc.c (ASM_DEBUG_DWARF_OPTION): Set again to --gdwarf2 in
	the case where HAVE_AS_WORKING_DWARF_N_FLAG is not defined
	and HAVE_LD_BROKEN_PE_DWARF5 is defined.

2021-07-07  Peter Bergner  <bergner@linux.ibm.com>

	Backported from master:
	2021-07-07  Peter Bergner  <bergner@linux.ibm.com>

	* config/rs6000/rs6000-call.c (mma_init_builtins): Use VSX_BUILTIN_LXVP
	and VSX_BUILTIN_STXVP.

2021-07-07  Peter Bergner  <bergner@linux.ibm.com>

	Backported from master:
	2021-07-02  Peter Bergner  <bergner@linux.ibm.com>

	* config/rs6000/rs6000-builtin.def (BU_MMA_PAIR_LD, BU_MMA_PAIR_ST):
	New macros.
	(__builtin_vsx_lxvp, __builtin_vsx_stxvp): New built-ins.
	* config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Expand
	lxvp and stxvp built-ins.
	(mma_init_builtins): Handle lxvp and stxvp built-ins.
	(builtin_function_type): Likewise.
	* doc/extend.texi (__builtin_vsx_lxvp, __builtin_mma_stxvp): Document.

2021-07-07  Michael Meissner  <meissner@linux.ibm.com>
	    2021-07-01 Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/rs6000.c (rs6000_maybe_emit_fp_cmove): Add IEEE
	128-bit floating point conditional move support.
	(have_compare_and_set_mask): Add IEEE 128-bit floating point
	types.
	* config/rs6000/rs6000.md (mov<mode>cc, IEEE128 iterator): New insn.
	(mov<mode>cc_p10, IEEE128 iterator): New insn.
	(mov<mode>cc_invert_p10, IEEE128 iterator): New insn.
	(fpmask<mode>, IEEE128 iterator): New insn.
	(xxsel<mode>, IEEE128 iterator): New insn.
	Backported from master:

2021-07-07  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-06-28  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/101229
	* gimple-walk.c (gimple_walk_op): Handle PHIs.

2021-07-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/101173
	PR tree-optimization/101280
	* gimple-loop-interchange.cc
	(tree_loop_interchange::valid_data_dependences): Properly
	guard all dependence checks with DDR_REVERSED_P or its
	inverse.

2021-07-07  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-06-22  Richard Biener  <rguenther@suse.de>

	PR middle-end/101156
	* gimplify.c (gimplify_expr): Remove premature incorrect
	optimization.

2021-07-07  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-06-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100923
	* tree-ssa-sccvn.c (valueize_refs_1): Take a pointer to
	the operand vector to be valueized.
	(valueize_refs): Likewise.
	(valueize_shared_reference_ops_from_ref): Adjust.
	(valueize_shared_reference_ops_from_call): Likewise.
	(vn_reference_lookup_3): Likewise.
	(vn_reference_lookup_pieces): Likewise.  Re-valueize
	with honoring availability when we are about to create
	the ao_ref and valueized before.
	(vn_reference_lookup): Likewise.
	(vn_reference_insert_pieces): Adjust.

2021-07-07  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-06-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/101088
	* tree-ssa-loop-im.c (sm_seq_valid_bb): Only look for
	supported refs on edges.  Do not assert same ref but
	different kind stores are unsuported but mark them so.
	(hoist_memory_references): Only look for supported refs
	on exits.

2021-07-07  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-06-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/101025
	* tree-ssa-loop-im.c (sm_seq_valid_bb): Make sure to process
	all refs that require dependence checking.

2021-07-06  Clément Chigot  <clement.chigot@atos.net>

	Backported from master:
	2021-06-10  Clement Chigot  <clement.chigot@atos.net>

	* config/rs6000/aix71.h (ASM_CPU_SPEC): Add Power10 directive.
	* config/rs6000/aix72.h (ASM_CPU_SPEC): Likewise.

2021-07-06  David Edelsohn  <dje.gcc@gmail.com>

	Backported from master:
	2021-05-20  Clement Chigot  <clement.chigot@atos.net>
		    David Edelsohn  <dje.gcc@gmail.com>

	* collect2.c (scan_prog_file): Issue non-fatal warning for
	non-COFF files.

2021-07-02  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic-show-locus.c (diagnostic_show_locus): Don't reject
	printing the same location twice if there are fix-it hints,
	multiple locations, or a label.

2021-07-02  Eric Botcazou  <ebotcazou@adacore.com>

	* config/i386/i386.c (asm_preferred_eh_data_format): Always use the
	PIC encodings for PE-COFF targets.

2021-06-30  Pat Haugen  <pthaugen@linux.ibm.com>

	* config/rs6000/power10.md (power10-fused-load, power10-fused-store,
	power10-fused_alu, power10-fused-vec, power10-fused-branch): New.

2021-06-25  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.c (vect_optimize_slp): Do not propagate
	across operations that have different semantics on different
	lanes.

2021-06-25  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-06-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/101158
	* tree-vect-slp.c (vect_build_slp_tree_1): Move same operand
	checking after checking for matching operation.

2021-06-25  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-06-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/101151
	* tree-ssa-sink.c (statement_sink_location): Expand irreducible
	region check.

2021-06-25  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-06-24  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/101105
	* tree-vect-data-refs.c (vect_prune_runtime_alias_test_list):
	Only ignore steps when they are equal or scalar order is preserved.

2021-06-25  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-05-19  Richard Biener  <rguenther@suse.de>

	PR middle-end/100672
	* fold-const.c (fold_negate_expr_1): Use element_precision.
	(negate_expr_p): Likewise.

2021-06-24  Eric Botcazou  <ebotcazou@adacore.com>

	* dwarf2out.c (dwarf2out_assembly_start): Emit .file 0 marker here..
	(dwarf2out_finish): ...instead of here.

2021-06-24  Eric Botcazou  <ebotcazou@adacore.com>

	* configure.ac (--gdwarf-5 option): Use objdump instead of readelf.
	(working --gdwarf-4/--gdwarf-5 for all sources): Likewise.
	(--gdwarf-4 not refusing generated .debug_line): Adjust for Windows.
	* configure: Regenerate.

2021-06-23  Aaron Sawdey  <acsawdey@linux.ibm.com>

	Backported from master:
	2021-06-23  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config/rs6000/rs6000-cpus.def: Take OPTION_MASK_PCREL_OPT out
	of OTHER_POWER10_MASKS so it will not be enabled by default.

2021-06-23  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/rs6000.c (rs6000_emit_minmax): Add support for ISA
	3.1 IEEE 128-bit floating point xsmaxcqp/xsmincqp instructions.
	* config/rs6000/rs6000.md (s<minmax><mode>3, IEEE128 iterator):
	New insns.

2021-06-23  Uros Bizjak  <ubizjak@gmail.com>

	Backported from master:
	2021-06-23  Uroš Bizjak  <ubizjak@gmail.com>

	PR target/101175
	* config/i386/i386.md (bsr_rex64): Add zero-flag setting RTX.
	(bsr): Ditto.
	(*bsrhi): Remove.
	(clz<mode>2): Update RTX pattern for additions.

2021-06-23  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-06-23  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/101167
	* omp-low.c (lower_omp_regimplify_p): Regimplify also PARM_DECLs
	and RESULT_DECLs that have DECL_HAS_VALUE_EXPR_P set.

2021-06-23  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-06-21  Jakub Jelinek  <jakub@redhat.com>

	PR inline-asm/100785
	* cfgexpand.c (expand_asm_stmt): If errors are emitted,
	remove all inputs, outputs and clobbers from the asm and
	set template to "".

2021-06-22  liuhongt  <hongtao.liu@intel.com>

	PR target/100310
	* config/i386/i386-expand.c
	(ix86_expand_special_args_builtin): Keep constm1_operand only
	if it satisfies insn's operand predicate.

2021-06-21  Carl Love  <cel@us.ibm.com>

	* config/rs6000/altivec.h (vec_signextll, vec_signexti, vec_signextq):
	Add define for new builtins.
	* config/rs6000/altivec.md(altivec_vreveti2): Add define_expand.
	* config/rs6000/rs6000-builtin.def (VSIGNEXTI, VSIGNEXTLL):  Add
	overloaded builtin definitions.
	(VSIGNEXTSB2W, VSIGNEXTSH2W, VSIGNEXTSB2D, VSIGNEXTSH2D,VSIGNEXTSW2D,
	VSIGNEXTSD2Q):	Add builtin expansions.
	(SIGNEXT): Add P10 overload definition.
	* config/rs6000/rs6000-call.c (P9V_BUILTIN_VEC_VSIGNEXTI,
	P9V_BUILTIN_VEC_VSIGNEXTLL, P10_BUILTIN_VEC_SIGNEXT): Add
	overloaded argument definitions.
	* config/rs6000/vsx.md (vsx_sign_extend_v2di_v1ti): Add define_insn.
	(vsignextend_v2di_v1ti, vsignextend_qi_<mode>, vsignextend_hi_<mode>,
	vsignextend_si_v2di)[VIlong]: Add define_expand.
	Make define_insn vsx_sign_extend_si_v2di visible.
	* doc/extend.texi:  Add documentation for the vec_signexti,
	vec_signextll builtins and vec_signextq.

2021-06-21  Carl Love  <cel@us.ibm.com>

	* config/rs6000/rs6000.c (__fixkfti, __fixunskfti, __floattikf,
	__floatuntikf): Names changed to __fixkfti_sw, __fixunskfti_sw,
	__floattikf_sw, __floatuntikf_sw respectively.
	* config/rs6000/rs6000.md (floatti<mode>2, floatunsti<mode>2,
	fix_trunc<mode>ti2, fixuns_trunc<mode>ti2): Add
	define_insn for mode IEEE 128.

2021-06-21  Carl Love  <cel@us.ibm.com>

	* config/rs6000/altivec.md (altivec_vslq, altivec_vsrq):
	Rename to altivec_vslq_<mode>, altivec_vsrq_<mode>, mode VEC_TI.
	* config/rs6000/vector.md (VEC_TI): Was named VSX_TI in vsx.md.
	(vashlv1ti3): Change to vashl<mode>3, mode VEC_TI.
	(vlshrv1ti3): Change to vlshr<mode>3, mode VEC_TI.
	* config/rs6000/vsx.md (VSX_TI): Remove define_mode_iterator. Update
	uses of VSX_TI to VEC_TI.

2021-06-21  Carl Love  <cel@us.ibm.com>

	* config/rs6000/dfp.md (floattitd2, fixtdti2): New define_insns.

2021-06-21  Carl Love  <cel@us.ibm.com>

	* config/rs6000/altivec.h (vec_dive, vec_mod): Add define for new
	builtins.
	* config/rs6000/altivec.md (UNSPEC_VMULEUD, UNSPEC_VMULESD,
	UNSPEC_VMULOUD, UNSPEC_VMULOSD): New unspecs.
	(altivec_eqv1ti, altivec_gtv1ti, altivec_gtuv1ti, altivec_vmuleud,
	altivec_vmuloud, altivec_vmulesd, altivec_vmulosd, altivec_vrlq,
	altivec_vrlqmi, altivec_vrlqmi_inst, altivec_vrlqnm,
	altivec_vrlqnm_inst, altivec_vslq, altivec_vsrq, altivec_vsraq,
	altivec_vcmpequt_p, altivec_vcmpgtst_p, altivec_vcmpgtut_p): New
	define_insn.
	(vec_widen_umult_even_v2di, vec_widen_smult_even_v2di,
	vec_widen_umult_odd_v2di, vec_widen_smult_odd_v2di, altivec_vrlqmi,
	altivec_vrlqnm): New define_expands.
	* config/rs6000/rs6000-builtin.def (VCMPEQUT_P, VCMPGTST_P,
	VCMPGTUT_P): Add macro expansions.
	(BU_P10V_AV_P): Add builtin predicate definition.
	(VCMPGTUT, VCMPGTST, VCMPEQUT, CMPNET, CMPGE_1TI,
	CMPGE_U1TI, CMPLE_1TI, CMPLE_U1TI, VNOR_V1TI_UNS, VNOR_V1TI, VCMPNET_P,
	VCMPAET_P, VMULEUD, VMULESD, VMULOUD, VMULOSD, VRLQ,
	VSLQ, VSRQ, VSRAQ, VRLQNM, DIV_V1TI, UDIV_V1TI, DIVES_V1TI, DIVEU_V1TI,
	MODS_V1TI, MODU_V1TI, VRLQMI): New macro expansions.
	(VRLQ, VSLQ, VSRQ, VSRAQ, DIVE, MOD): New overload expansions.
	* config/rs6000/rs6000-call.c (P10_BUILTIN_VCMPEQUT,
	P10V_BUILTIN_CMPGE_1TI, P10V_BUILTIN_CMPGE_U1TI,
	P10V_BUILTIN_VCMPGTUT, P10V_BUILTIN_VCMPGTST,
	P10V_BUILTIN_CMPLE_1TI, P10V_BUILTIN_VCMPLE_U1TI,
	P10V_BUILTIN_DIV_V1TI, P10V_BUILTIN_UDIV_V1TI,
	P10V_BUILTIN_VMULESD, P10V_BUILTIN_VMULEUD,
	P10V_BUILTIN_VMULOSD, P10V_BUILTIN_VMULOUD,
	P10V_BUILTIN_VNOR_V1TI, P10V_BUILTIN_VNOR_V1TI_UNS,
	P10V_BUILTIN_VRLQ, P10V_BUILTIN_VRLQMI,
	P10V_BUILTIN_VRLQNM, P10V_BUILTIN_VSLQ,
	P10V_BUILTIN_VSRQ, P10V_BUILTIN_VSRAQ,
	P10V_BUILTIN_VCMPGTUT_P, P10V_BUILTIN_VCMPGTST_P,
	P10V_BUILTIN_VCMPEQUT_P, P10V_BUILTIN_VCMPGTUT_P,
	P10V_BUILTIN_VCMPGTST_P, P10V_BUILTIN_CMPNET,
	P10V_BUILTIN_VCMPNET_P, P10V_BUILTIN_VCMPAET_P,
	P10V_BUILTIN_DIVES_V1TI, P10V_BUILTIN_MODS_V1TI,
	P10V_BUILTIN_MODU_V1TI):
	New overloaded definitions.
	(rs6000_gimple_fold_builtin) [P10V_BUILTIN_VCMPEQUT,
	P10V_BUILTIN_CMPNET, P10V_BUILTIN_CMPGE_1TI,
	P10V_BUILTIN_CMPGE_U1TI, P10V_BUILTIN_VCMPGTUT,
	P10V_BUILTIN_VCMPGTST, P10V_BUILTIN_CMPLE_1TI,
	P10V_BUILTIN_CMPLE_U1TI]: New case statements.
	(rs6000_init_builtins) [bool_V1TI_type_node, int_ftype_int_v1ti_v1ti]:
	New assignments.
	(altivec_init_builtins): New E_V1TImode case statement.
	(builtin_function_type)[P10_BUILTIN_128BIT_VMULEUD,
	P10_BUILTIN_128BIT_VMULOUD, P10_BUILTIN_128BIT_DIVEU_V1TI,
	P10_BUILTIN_128BIT_MODU_V1TI, P10_BUILTIN_CMPGE_U1TI,
	P10_BUILTIN_VCMPGTUT, P10_BUILTIN_VCMPEQUT]: New case statements.
	* config/rs6000/rs6000.c (rs6000_handle_altivec_attribute) [E_TImode,
	E_V1TImode]: New case statements.
	* config/rs6000/rs6000.h (rs6000_builtin_type_index): New enum
	value RS6000_BTI_bool_V1TI.
	* config/rs6000/vector.md (vector_gtv1ti,vector_nltv1ti,
	vector_gtuv1ti, vector_nltuv1ti, vector_ngtv1ti, vector_ngtuv1ti,
	vector_eq_v1ti_p, vector_ne_v1ti_p, vector_ae_v1ti_p,
	vector_gt_v1ti_p, vector_gtu_v1ti_p, vrotlv1ti3, vashlv1ti3,
	vlshrv1ti3, vashrv1ti3): New define_expands.
	* config/rs6000/vsx.md (UNSPEC_VSX_DIVSQ, UNSPEC_VSX_DIVUQ,
	UNSPEC_VSX_DIVESQ, UNSPEC_VSX_DIVEUQ, UNSPEC_VSX_MODSQ,
	UNSPEC_VSX_MODUQ): New unspecs.
	(mulv2di3, vsx_div_v1ti, vsx_udiv_v1ti, vsx_dives_v1ti,
	vsx_diveu_v1ti,	vsx_mods_v1ti, vsx_modu_v1ti, xxswapd_v1ti): New
	define_insns.
	(vcmpnet): New define_expand.
	* doc/extend.texi: Add documentation for the new builtins vec_rl,
	vec_rlmi, vec_rlnm, vec_sl, vec_sr, vec_sra, vec_mule, vec_mulo,
	vec_div, vec_dive, vec_mod, vec_cmpeq, vec_cmpne, vec_cmpgt, vec_cmplt,
	vec_cmpge, vec_cmple, vec_all_eq, vec_all_ne, vec_all_gt, vec_all_lt,
	vec_all_ge, vec_all_le, vec_any_eq, vec_any_ne, vec_any_gt, vec_any_lt,
	vec_any_ge, vec_any_le.

2021-06-21  Carl Love  <cel@us.ibm.com>

	* config/rs6000/altivec.md (altivec_vrl<VI_char>mi): Fix
	bug in argument generation.

2021-06-18  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	Backported from master:
	2021-06-18  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	PR target/100856
	* common/config/arm/arm-common.c (arm_canon_arch_option_1): New function
	derived from arm_canon_arch.
	(arm_canon_arch_option): Call it.
	(arm_canon_arch_multilib_option): New function.
	* config/arm/arm-cpus.in (IGNORE_FOR_MULTILIB): New fgroup.
	* config/arm/arm.h (arm_canon_arch_multilib_option): New prototype.
	(CANON_ARCH_MULTILIB_SPEC_FUNCTION): New macro.
	(MULTILIB_ARCH_CANONICAL_SPECS): New macro.
	(DRIVER_SELF_SPECS): Add MULTILIB_ARCH_CANONICAL_SPECS.
	* config/arm/arm.opt (mlibarch): New option.
	* config/arm/t-rmprofile (MULTILIB_MATCHES): For armv8*-m, replace use
	of march on RHS with mlibarch.

2021-06-18  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	Backported from master:
	2021-06-11  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	PR target/101016
	* config/arm/arm_mve.h (__arm_vld1q): Change __ARM_mve_coerce(p0,
	int8_t const *) to __ARM_mve_coerce1(p0, int8_t *) in the argument for
	the polymorphic variants matching code.
	(__arm_vld1q_z): Likewise.
	(__arm_vld2q): Likewise.
	(__arm_vld4q): Likewise.
	(__arm_vldrbq_gather_offset): Likewise.
	(__arm_vldrbq_gather_offset_z): Likewise.

2021-06-18  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/101062
	* stor-layout.c (finish_bitfield_layout): Don't add bitfield
	representatives in QUAL_UNION_TYPE.

2021-06-18  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-06-16  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/101062
	* stor-layout.c (finish_bitfield_representative): For fields in unions
	assume nextf is always NULL.
	(finish_bitfield_layout): Compute bit field representatives also in
	unions, but handle it as if each bitfield was the only field in the
	aggregate.

2021-06-17  Peter Bergner  <bergner@linux.ibm.com>

	Backported from master:
	2021-06-14  Peter Bergner  <bergner@linux.ibm.com>

	PR target/100777
	* config/rs6000/rs6000-call.c (rs6000_gimple_fold_mma_builtin): Use
	create_tmp_reg_or_ssa_name().

2021-06-17  Peter Bergner  <bergner@linux.ibm.com>

	Backported from master:
	2021-06-10  Peter Bergner  <bergner@linux.ibm.com>

	* config/rs6000/rs6000-builtin.def (build_pair): New built-in.
	(build_acc): Likewise.
	* config/rs6000/rs6000-call.c (mma_expand_builtin): Swap assemble
	source operands in little-endian mode.
	(rs6000_gimple_fold_mma_builtin): Handle VSX_BUILTIN_BUILD_PAIR.
	(mma_init_builtins): Likewise.
	* config/rs6000/rs6000.c (rs6000_split_multireg_move): Handle endianness
	ordering for the MMA assemble and build source operands.
	* doc/extend.texi (__builtin_vsx_build_acc, __builtin_mma_build_pair):
	Document.
	(__builtin_mma_assemble_acc, __builtin_mma_assemble_pair): Remove
	documentation.

2021-06-17  Peter Bergner  <bergner@linux.ibm.com>

	Backported from master:
	2021-05-31  Peter Bergner  <bergner@linux.ibm.com>

	PR target/99842
	* config/rs6000/predicates.md(mma_assemble_input_operand): Allow
	indexed form addresses.

2021-06-17  Martin Sebor  <msebor@redhat.com>

	PR middle-end/100876
	* builtins.c: (gimple_call_return_array): Account for size_t
	mangling as either unsigned int or unsigned long

2021-06-17  Martin Sebor  <msebor@redhat.com>

	PR c++/100876
	* builtins.c (gimple_call_return_array): Check for attribute fn spec.
	Handle calls to placement new.
	(ndecl_dealloc_argno): Avoid placement delete.

2021-06-17  Martin Sebor  <msebor@redhat.com>

	PR middle-end/100732
	* gimple-fold.c (gimple_fold_builtin_sprintf): Avoid folding calls
	with either source or destination argument of invalid type.
	* tree-ssa-uninit.c (maybe_warn_pass_by_reference): Avoid checking
	calls with arguments of invalid type.

2021-06-17  Martin Sebor  <msebor@redhat.com>

	PR middle-end/100684
	* tree-ssa-ccp.c (pass_post_ipa_warn::execute): Handle C++ lambda.

2021-06-17  Martin Sebor  <msebor@redhat.com>

	PR middle-end/100574
	* builtins.c (access_ref::get_ref): Improve detection of PHIs with
	all null arguments.

2021-06-17  Martin Sebor  <msebor@redhat.com>

	PR middle-end/100307
	* builtins.c (compute_objsize_r): Clear base0 for pointers.

2021-06-17  Martin Sebor  <msebor@redhat.com>

	PR middle-end/100250
	* attribs.c (attr_access::array_as_string): Avoid dereferencing
	a pointer when it's null.

2021-06-17  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config/rs6000/genfusion.pl (gen_logical_addsubf): Refactor to
	add generation of logical-add and add-logical fusion pairs.  Add
	earlyclobber to alts 0/1.
	(gen_addadd): Add earlyclobber to alts 0/1.
	* config/rs6000/rs6000-cpus.def: Add new fusion to ISA 3.1 mask
	and powerpc mask.
	* config/rs6000/rs6000.c (rs6000_option_override_internal): Turn on
	logical-add and add-logical fusion by default.
	* config/rs6000/rs6000.opt: Add -mpower10-fusion-logical-add and
	-mpower10-fusion-add-logical options.
	* config/rs6000/fusion.md: Regenerate file.

2021-06-17  Marius Hillenbrand  <mhillen@linux.ibm.com>

	Backported from master:
	2021-06-17  Marius Hillenbrand  <mhillen@linux.ibm.com>

	PR target/100871
	* config/s390/vecintrin.h (vec_doublee): Fix to use
	  __builtin_s390_vflls.
	(vec_floate): Fix to use __builtin_s390_vflrd.

2021-06-17  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-06-15  Jakub Jelinek  <jakub@redhat.com>

	PR target/101046
	* expr.c (expand_expr_real_2) <case VEC_PACK_FIX_TRUNC_EXPR,
	case VEC_PACK_TRUNC_EXPR>: Clear subtarget when changing mode.

2021-06-17  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-06-11  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/101008
	* simplify-rtx.c (relational_result): New function.
	(simplify_logical_relational_operation,
	simplify_relational_operation): Use it.

2021-06-17  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-06-10  Jakub Jelinek  <jakub@redhat.com>

	PR debug/100852
	* ifcvt.c (noce_get_alt_condition, noce_try_abs): Use
	prev_nonnote_nondebug_insn instead of prev_nonnote_insn.

2021-06-17  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-06-07  Jakub Jelinek  <jakub@redhat.com>

	PR target/100887
	* fold-const.c (fold_read_from_vector): Return NULL if trying to
	read from a CONSTRUCTOR with vector type elements.

2021-06-17  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-06-07  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/100898
	* tree-inline.c (copy_bb): Only use gimple_call_arg_ptr if memcpy
	should copy any arguments.  Don't call gimple_call_num_args
	on id->call_stmt or call_stmt more than once.

2021-06-17  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-06-04  Jakub Jelinek  <jakub@redhat.com>

	PR target/100887
	* config/i386/i386-expand.c (ix86_expand_vector_init): Handle
	concatenation from half-sized modes with TImode elements.

2021-06-16  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-06-11  Richard Biener  <rguenther@suse.de>

	PR middle-end/101009
	* tree-data-ref.c (build_classic_dist_vector_1): Make sure
	to set *init_b to true when we encounter a constant equal
	index pair.
	(compute_affine_dependence): Also dump the actual DR_REF.

2021-06-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100981
	* tree-vect-loop.c (vect_create_epilog_for_reduction): Use
	gimple_get_lhs to also handle calls.
	* tree-vect-slp-patterns.c (complex_pattern::build): Transfer
	reduction info.

2021-06-16  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-06-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100934
	* tree-ssa-dom.c (pass_dominator::execute): Properly
	mark irreducible regions.

2021-06-16  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-05-28  Richard Biener  <rguenther@suse.de>

	PR ipa/100791
	* tree-inline.c (copy_bb): When processing __builtin_va_arg_pack
	copy fntype from original call.

2021-06-14  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config/rs6000/genfusion.pl (gen_addadd): New function.
	* config/rs6000/fusion.md: Regenerate file.
	* config/rs6000/rs6000-cpus.def: Add
	OPTION_MASK_P10_FUSION_2ADD to masks.
	* config/rs6000/rs6000.c (rs6000_option_override_internal):
	Handle default value of OPTION_MASK_P10_FUSION_2ADD.
	* config/rs6000/rs6000.opt: Add -mpower10-fusion-2add.

2021-06-11  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config/rs6000/rs6000.md (define_attr "type"): Add types for fusion.
	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10): Use new fusion types.
	(gen_2logical): Use new fusion types.
	* config/rs6000/fusion.md: Regenerate.

2021-06-09  Claudiu Zissulescu  <claziss@synopsys.com>

	Backported from master:
	2021-06-09  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (loop_end): Change it to
	define_insn_and_split.

2021-06-09  Claudiu Zissulescu  <claziss@synopsys.com>

	Backported from master:
	2021-06-09  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (maddhisi4): Use VMAC2H instruction.
	(machi): New pattern.
	(umaddhisi4): Use VMAC2HU instruction.
	(umachi): New pattern.

2021-06-09  Claudiu Zissulescu  <claziss@synopsys.com>

	Backported from master:
	2021-06-09  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc-protos.h (arc_split_move_p): New prototype.
	* config/arc/arc.c (arc_split_move_p): New function.
	(arc_split_move): Clean up.
	* config/arc/arc.md (movdi_insn): Clean up, use arc_split_move_p.
	(movdf_insn): Likewise.
	* config/arc/simdext.md (mov<VWH>_insn): Likewise.

2021-06-08  Pat Haugen  <pthaugen@linux.ibm.com>

	* config/rs6000/rs6000-logue.c (rs6000_emit_prologue): Use
	gen_frame_store.

2021-06-07  liuhongt  <hongtao.liu@intel.com>

	PR target/100885
	* config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): Refine
	constraints.
	(<insn>v4siv4di2): Delete constraints for define_expand.

2021-06-03  Eric Botcazou  <ebotcazou@adacore.com>

	PR ipa/99122
	* tree-inline.c (inline_forbidden_p): Remove test on return type.

2021-06-03  Eric Botcazou  <ebotcazou@adacore.com>

	* range-op.cc (get_bool_state): Adjust head comment.
	(operator_not_equal::op1_range): Fix comment.
	(operator_bitwise_xor::op1_range): Remove call to gcc_unreachable.

2021-06-03  Alex Coplan  <alex.coplan@arm.com>

	Backported from master:
	2021-05-19  Alex Coplan  <alex.coplan@arm.com>

	PR target/100333
	* config/arm/arm.md (nonsecure_call_internal): Always ensure
	callee's address is in a register.

2021-06-03  Claudiu Zissulescu  <claziss@synopsys.com>

	Backported from master:
	2021-06-02  Vineet Gupta  <vgupta@synopsys.com>

	* config/arc/arc.h (TARGET_CPU_DEFAULT): Change to hs38_linux.

2021-06-02  Uroš Bizjak  <ubizjak@gmail.com>

	* config/i386/sse.md (abs<MMXMODEI:mode>2):
	Change define_insn to define_expand.

2021-06-02  Uros Bizjak  <ubizjak@gmail.com>

	Backported from master:
	2021-05-18  Uroš Bizjak  <ubizjak@gmail.com>

	* config/i386/sse.md (<any_extend:insn>v4qiv4di2):
	Fix a mode mismatch with operand 1.

2021-06-01  Jason Merrill  <jason@redhat.com>

	PR c++/91859
	* tree.h (CALL_FROM_NEW_OR_DELETE_P): Adjust comment.

2021-05-31  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-05-19  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/100576
	* builtins.c (check_read_access): Convert bound to size_type_node if
	non-NULL.

2021-05-31  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-05-18  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/100590
	* regcprop.c (copyprop_hardreg_forward_1): Only DCE dead sets if
	they are NONJUMP_INSN_P.

2021-05-31  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-05-18  Jakub Jelinek  <jakub@redhat.com>

	PR c++/100580
	* function.c (push_dummy_function): Set DECL_ARTIFICIAL and
	DECL_ASSEMBLER_NAME on the fn_decl.

2021-05-31  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-05-15  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/100342
	* regcprop.c (copy_value): When copying a source reg in a wider
	mode than it has recorded for the value, adjust recorded destination
	mode too or punt if !REG_CAN_CHANGE_MODE_P.

2021-05-28  David Edelsohn  <dje.gcc@gmail.com>

	PR target/94177
	* calls.c (precompute_register_parameters): Additionally test
	targetm.precompute_tls_p to pre-compute argument.
	* config/rs6000/aix.h (TARGET_PRECOMPUTE_TLS_P): Define.
	* config/rs6000/rs6000.c (rs6000_aix_precompute_tls_p): New.
	* target.def (precompute_tls_p): New.
	* doc/tm.texi.in (TARGET_PRECOMPUTE_TLS_P): Add hook documentation.
	* doc/tm.texi: Regenerated.
	(cherry-picked from commit a21b399708175f6fc0ac723a0cebc127da421c60)

2021-05-27  Richard Earnshaw  <rearnsha@arm.com>

	Backported from master:
	2021-05-27  Richard Earnshaw  <rearnsha@arm.com>

	PR target/100767
	* config/arm/arm.c (arm_configure_build_target): Remove parameter
	opts_set, directly check opts parameters for being non-null.
	(arm_option_restore): Update call to arm_configure_build_target.
	(arm_option_override): Likewise.
	(arm_can_inline_p): Likewise.
	(arm_valid_target_attribute_tree): Likewise.
	* config/arm/arm-c.c (arm_pragma_target_parse): Likewise.
	* config/arm/arm-protos.h (arm_configure_build_target): Adjust
	prototype.

2021-05-27  Alex Coplan  <alex.coplan@arm.com>

	Backported from master:
	2021-05-11  Alex Coplan  <alex.coplan@arm.com>

	PR target/99725
	* config/arm/arm.c (cmse_nonsecure_call_inline_register_clear):
	Avoid emitting CFA adjusts on the sp if we have the fp.

2021-05-25  Uros Bizjak  <ubizjak@gmail.com>

	Backported from master:
	2021-05-18  Uroš Bizjak  <ubizjak@gmail.com>

	PR target/100626
	* config/i386/i386-expand.c (split_double_mode): Return
	temporary register when simplify_gen_subreg fails with
	the high half od the paradoxical subreg.

2021-05-25  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-05-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100519
	* tree-ssa-reassoc.c (can_associate_p): Split into...
	(can_associate_op_p): ... this
	(can_associate_type_p): ... and this.
	(is_reassociable_op): Call can_associate_op_p.
	(break_up_subtract_bb): Call the appropriate predicates.
	(reassociate_bb): Likewise.

2021-05-25  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-05-11  Richard Biener  <rguenther@suse.de>

	PR ipa/100513
	* ipa-param-manipulation.c
	(ipa_param_body_adjustments::modify_call_stmt): Avoid
	altering SSA_NAME_DEF_STMT by adjusting the calls LHS
	via gimple_call_lhs_ptr.

2021-05-25  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-05-11  Richard Biener  <rguenther@suse.de>

	PR middle-end/100509
	* gimple-fold.c (fold_gimple_assign): Only call
	get_symbol_constant_value on register type symbols.

2021-05-25  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-05-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100492
	* tree-loop-distribution.c (find_seed_stmts_for_distribution):
	Find nothing when the loop contains an irreducible region.

2021-05-24  Alex Coplan  <alex.coplan@arm.com>

	Backported from master:
	2021-05-10  Alex Coplan  <alex.coplan@arm.com>

	PR target/99960
	* config/arm/mve.md (*mve_mov<mode>): Simplify output code. Use
	vldrw.u32 and vstrw.32 for V2D[IF]mode loads and stores.

2021-05-20  Andreas Krebbel  <krebbel@linux.ibm.com>

	Backported from master:
	2021-05-18  Andreas Krebbel  <krebbel@linux.ibm.com>

	PR c++/100281
	* tree.c (build_reference_type_for_mode)
	(build_pointer_type_for_mode): Pick pointer mode if MODE argument
	is VOIDmode.
	(build_reference_type, build_pointer_type): Invoke
	build_*_type_for_mode with VOIDmode.

2021-05-19  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
	__ROP_PROTECT__ if -mrop-protect is selected.

2021-05-19  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000-internal.h (rs6000_stack): Add
	rop_hash_save_offset and rop_hash_size.
	* config/rs6000/rs6000-logue.c (rs6000_stack_info): Compute
	rop_hash_size and rop_hash_save_offset.
	(debug_stack_info): Dump rop_hash_save_offset and rop_hash_size.
	(rs6000_emit_prologue): Emit hashst[p] in prologue.
	(rs6000_emit_epilogue): Emit hashchk[p] in epilogue.
	* config/rs6000/rs6000.md (unspec): Add UNSPEC_HASHST and
	UNSPEC_HASHCHK.
	(hashst): New define_insn.
	(hashchk): Likewise.

2021-05-19  Bill Schmidt  <wschmidt@linux.ibm.com>

	* config/rs6000/rs6000.c (rs6000_option_override_internal):
	Disable shrink wrap when inserting ROP-protect instructions.
	* config/rs6000/rs6000.opt (mrop-protect): New option.
	(mprivileged): Likewise.
	* doc/invoke.texi: Document mrop-protect and mprivileged.

2021-05-19  Jonathan Wakely  <jwakely@redhat.com>

	Backported from master:
	2021-05-19  Jonathan Wakely  <jwakely@redhat.com>

	* doc/cpp.texi (Common Predefined Macros): Update documentation
	for the __GXX_EXPERIMENTAL_CXX0X__ macro.

2021-05-17  Alex Coplan  <alex.coplan@arm.com>

	Backported from master:
	2021-04-27  Alex Coplan  <alex.coplan@arm.com>

	PR target/99977
	* config/arm/arm.c (arm_split_compare_and_swap): Fix up codegen
	with negative immediates: ensure we expand cbranchsi4_scratch
	correctly and ensure we satisfy its constraints.
	* config/arm/sync.md
	(@atomic_compare_and_swap<CCSI:arch><NARROW:mode>_1): Don't
	attempt to tie two output operands together with constraints;
	collapse two alternatives.
	(@atomic_compare_and_swap<CCSI:arch><SIDI:mode>_1): Likewise.
	* config/arm/thumb1.md (cbranchsi4_neg_late): New.

2021-05-17  Marius Hillenbrand  <mhillen@linux.ibm.com>

	Backported from master:
	2021-05-17  Marius Hillenbrand  <mhillen@linux.ibm.com>

	PR bootstrap/100552
	* configure.ac: Replace pattern substitution with call to sed.
	* configure: Regenerate.

2021-05-13  Tobias Burnus  <tobias@codesourcery.com>

	Backported from master:
	2021-05-12  Tobias Burnus  <tobias@codesourcery.com>

	* omp-low.c (finish_taskreg_scan): Use the proper detach decl.

2021-05-13  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>

	Backported from master:
	2021-05-11  Srinath Parvathaneni  <srinath.parvathaneni@arm.com>
		    Joe Ramsay   <joe.ramsay@arm.com>

	PR target/100419
	* config/arm/arm_mve.h (__arm_vstrwq_scatter_offset): Fix wrong arguments.
	(__arm_vcmpneq): Remove duplicate definition.
	(__arm_vstrwq_scatter_offset_p): Likewise.
	(__arm_vmaxq_x): Likewise.
	(__arm_vmlsdavaq): Likewise.
	(__arm_vmlsdavaxq): Likewise.
	(__arm_vmlsdavq_p): Likewise.
	(__arm_vmlsdavxq_p): Likewise.
	(__arm_vrmlaldavhaq): Likewise.
	(__arm_vstrbq_p): Likewise.
	(__arm_vstrbq_scatter_offset): Likewise.
	(__arm_vstrbq_scatter_offset_p): Likewise.
	(__arm_vstrdq_scatter_offset): Likewise.
	(__arm_vstrdq_scatter_offset_p): Likewise.
	(__arm_vstrdq_scatter_shifted_offset): Likewise.
	(__arm_vstrdq_scatter_shifted_offset_p): Likewise.

2021-05-13  Richard Earnshaw  <rearnsha@arm.com>

	PR target/100563
	* config/arm/arm.c (arm_canonicalize_comparison): Correctly
	canonicalize DImode inequality comparisons against the
	maximum integral value.

2021-05-12  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-05-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100566
	* tree-ssa-sccvn.c (dominated_by_p_w_unex): Properly handle
	allow_back for all edge queries.

2021-05-12  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-05-12  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/100508
	* cfgexpand.c (expand_debug_expr): For DEBUG_EXPR_DECL with vector
	type, don't reuse DECL_RTL if it has different mode, instead force
	creation of a new DEBUG_EXPR.

2021-05-12  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-05-11  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/100471
	* omp-low.c (lower_omp_task_reductions): For OMP_TASKLOOP, if data
	is 0, bypass the reduction loop including
	GOMP_taskgroup_reduction_unregister call.

2021-05-12  Geng Qi  <gengqi@linux.alibaba.com>

	Backported from master:
	2021-04-30  Geng Qi  <gengqi@linux.alibaba.com>

	* config/riscv/riscv.opt (march=,mabi=): Negative itself.

2021-05-11  Alex Coplan  <alex.coplan@arm.com>

	PR target/99988
	* config/aarch64/aarch64-bti-insert.c (aarch64_bti_j_insn_p): New.
	(rest_of_insert_bti): Avoid inserting duplicate bti j insns for
	jump table targets.

2021-05-06  Marius Hillenbrand  <mhillen@linux.ibm.com>

	Backported from master:
	2021-05-06  Marius Hillenbrand  <mhillen@linux.ibm.com>

	* config/s390/s390-builtins.def (O_M5, O1_M5, ...): Remove unused macros.
	(s390_vec_permi_s64, s390_vec_permi_b64, s390_vec_permi_u64)
	(s390_vec_permi_dbl, s390_vpdi): Use the O3_U2 type for the immediate
	operand.
	* config/s390/s390.c (s390_const_operand_ok): Remove unused
	values.

2021-05-06  Roman Zhuykov  <zhroma@ispras.ru>

	Backported from master:
	2021-04-30  Roman Zhuykov  <zhroma@ispras.ru>

	PR rtl-optimization/100225
	PR rtl-optimization/84878
	* modulo-sched.c (sms_schedule): Use note_stores to skip loops
	where we have an instruction which touches (writes) any hard
	register from df->regular_block_artificial_uses set.
	Allow not-single-set instruction only right before basic block
	tail.

2021-05-06  Ilya Leoshkevich  <iii@linux.ibm.com>

	PR target/100217
	* config/s390/s390.c (s390_hard_fp_reg_p): New function.
	(s390_md_asm_adjust): Handle hard registers.

2021-05-05  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/100402
	* config/i386/i386.c (ix86_compute_frame_layout): For a SEH target,
	always return the establisher frame for __builtin_frame_address (0).

2021-05-05  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	Backported from master:
	2021-05-05  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	PR rtl-optimization/100263
	* postreload.c (move2add_valid_value_p): Ensure register can
	change mode.

2021-05-05  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/100411
	* cfgcleanup.c (try_crossjump_to_edge): Also skip end of prologue
	and beginning of function markers.

2021-05-05  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-04-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100253
	* tree-vect-stmts.c (vectorizable_load): Do not assume
	element alignment when DR_MISALIGNMENT is -1.
	(vectorizable_store): Likewise.

2021-05-05  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-04-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100278
	* tree-ssa-pre.c (compute_avail): Give up when we cannot
	adjust TBAA beacuse of mismatching bases.

2021-05-05  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-04-29  Richard Biener  <rguenther@suse.de>

	PR ipa/100308
	* ipa-prop.c (ipcp_modif_dom_walker::before_dom_children):
	Track blocks to cleanup EH in new m_need_eh_cleanup.
	(ipcp_modif_dom_walker::cleanup_eh): New.
	(ipcp_transform_function): Release dominator info before
	doing EH cleanup.

2021-05-05  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-05-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100414
	* tree-ssa-phiopt.c (get_non_trapping): Do not compute dominance
	info here.
	(tree_ssa_phiopt_worker): But unconditionally here.

2021-05-05  Richard Biener  <rguenther@suse.de>

	Backported from master:
	2021-05-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100329
	* tree-ssa-reassoc.c (can_reassociate_p): Do not reassociate
	asm goto defs.
	(insert_stmt_after): Assert we're not running into asm goto.

2021-05-04  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-05-02  Jakub Jelinek  <jakub@redhat.com>

	PR target/100375
	* config/nvptx/nvptx.c (nvptx_sese_pseudo): Use nullptr instead of 0
	as first argument of pseudo_node_t constructors.

2021-05-01  Maciej W. Rozycki  <macro@orcam.me.uk>

	Backported from master:
	2021-04-27  Maciej W. Rozycki  <macro@orcam.me.uk>

	* config/vax/vax.c (print_operand_address, vax_address_cost_1)
	(index_term_p): Handle ASHIFT too.

2021-04-30  David Edelsohn  <dje.gcc@gmail.com>

	Backported from master:
	2021-04-27  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/aix.h (SUBTARGET_DRIVER_SELF_SPECS): New.
	* config/rs6000/aix64.opt (m64): New.
	(m32): New.

2021-04-30  Alex Coplan  <alex.coplan@arm.com>

	Backported from master:
	2021-04-23  Alex Coplan  <alex.coplan@arm.com>

	PR rtl-optimization/100230
	* early-remat.c (early_remat::sort_candidates): Use delete[]
	instead of delete for array allocated with new[].

2021-04-29  Richard Earnshaw  <rearnsha@arm.com>

	Backported from master:
	2021-04-28  Richard Earnshaw  <rearnsha@arm.com>

	PR target/100311
	* config/arm/arm.c (arm_hard_regno_mode_ok): Only allow VPR to be
	used in HImode.

2021-04-29  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-04-29  Jakub Jelinek  <jakub@redhat.com>

	PR target/100302
	* config/aarch64/aarch64.c (aarch64_add_offset_1_temporaries): Use
	absu_hwi instead of abs_hwi.

2021-04-29  Tom de Vries  <tdevries@suse.de>

	Backported from master:
	2021-04-29  Tom de Vries  <tdevries@suse.de>

	PR target/100232
	* internal-fn.c (expand_GOMP_SIMT_ENTER_ALLOC)
	(expand_GOMP_SIMT_LAST_LANE, expand_GOMP_SIMT_ORDERED_PRED)
	(expand_GOMP_SIMT_VOTE_ANY, expand_GOMP_SIMT_XCHG_BFLY)
	(expand_GOMP_SIMT_XCHG_IDX): Ensure target is assigned to.

2021-04-29  Richard Sandiford  <richard.sandiford@arm.com>

	Backported from master:
	2021-04-28  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/100305
	* config/aarch64/constraints.md (Utq): Require the address to
	be valid for both the element mode and for V2DImode.

2021-04-29  Richard Sandiford  <richard.sandiford@arm.com>

	Backported from master:
	2021-04-27  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/100270
	* config/aarch64/aarch64.c (aarch64_comp_type_attributes): Handle
	SVE attributes.

2021-04-28  YiFei Zhu  <zhuyifei1999@gmail.com>

	Backported from master:
	2021-04-23  YiFei Zhu  <zhuyifei1999@gmail.com>

	* config/bpf/bpf.h (ASM_OUTPUT_ALIGNED_BSS): Use .type and .lcomm.

2021-04-28  YiFei Zhu  <zhuyifei1999@gmail.com>

	Backported from master:
	2021-04-23  YiFei Zhu  <zhuyifei1999@gmail.com>

	* config/bpf/bpf.h (FUNCTION_BOUNDARY): Set to 64.

2021-04-28  Richard Earnshaw  <rearnsha@arm.com>

	Backported from master:
	2021-04-27  Richard Earnshaw  <rearnsha@arm.com>

	PR target/100236
	* config/arm/arm.c (THUMB2_WORK_REGS): Check PIC_OFFSET_TABLE_REGNUM
	is valid before including it in the mask.

2021-04-28  Uroš Bizjak  <ubizjak@gmail.com>

	PR target/100182
	* config/i386/sync.md (FILD_ATOMIC/FIST_ATOMIC FP load peephole2):
	Copy operand 3 to operand 4.  Use sse_reg_operand
	as operand 3 predicate.
	(FILD_ATOMIC/FIST_ATOMIC FP load peephole2 with mem blockage): Ditto.
	(LDX_ATOMIC/STX_ATOMIC FP load peephole2): Ditto.
	(LDX_ATOMIC/LDX_ATOMIC FP load peephole2 with mem blockage): Ditto.
	(FILD_ATOMIC/FIST_ATOMIC FP store peephole2):
	Copy operand 1 to operand 0.
	(FILD_ATOMIC/FIST_ATOMIC FP store peephole2 with mem blockage): Ditto.
	(LDX_ATOMIC/STX_ATOMIC FP store peephole2): Ditto.
	(LDX_ATOMIC/LDX_ATOMIC FP store peephole2 with mem blockage): Ditto.

2021-04-28  Cui,Lili  <lili.cui@intel.com>

	* common/config/i386/i386-common.c (processor_names):
	Sync processor_names with processor_type.
	* config/i386/i386-options.c (processor_cost_table):
	Sync processor_cost_table with processor_type.

2021-04-27  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-04-27  Jakub Jelinek  <jakub@redhat.com>

	PR target/100200
	* config/aarch64/aarch64.c (aarch64_print_operand): Cast -UINTVAL
	back to HOST_WIDE_INT.

2021-04-27  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-04-27  Jakub Jelinek  <jakub@redhat.com>

	PR target/100200
	* config/aarch64/predicates.md (aarch64_sub_immediate,
	aarch64_plus_immediate): Use -UINTVAL instead of -INTVAL.
	* config/aarch64/aarch64.md (casesi, rotl<mode>3): Likewise.
	* config/aarch64/aarch64.c (aarch64_print_operand,
	aarch64_split_atomic_op, aarch64_expand_subvti): Likewise.

2021-04-27  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-04-27  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/100239
	* tree-vect-generic.c (lower_vec_perm): Don't accept constant
	permutations with all indices from the first zero element as vec_shl.

2021-04-27  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-04-27  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/100254
	* cfgcleanup.c (outgoing_edges_match): Check REG_EH_REGION on
	last1 and last2 insns rather than BB_END (bb1) and BB_END (bb2) insns.

2021-04-27  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-04-26  Jakub Jelinek  <jakub@redhat.com>

	PR debug/100255
	* vmsdbgout.c (ASM_OUTPUT_DEBUG_STRING, vmsdbgout_begin_block,
	vmsdbgout_end_block, lookup_filename, vmsdbgout_source_line): Remove
	register keywords.

2021-04-27  Jakub Jelinek  <jakub@redhat.com>

	Backported from master:
	2021-04-21  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/100148
	* cprop.c (constprop_register): Use next_nondebug_insn instead of
	NEXT_INSN.

2021-04-27  Release Manager

	* GCC 11.1.0 released.

2021-04-20  Segher Boessenkool  <segher@kernel.crashing.org>

	Backported from master:
	2021-04-20  Segher Boessenkool  <segher@kernel.crashing.org>

	PR target/100108
	* config/rs6000/rs6000.c (rs6000_machine_from_flags): Do not consider
	OPTION_MASK_ISEL.

2021-04-20  Martin Liska  <mliska@suse.cz>

	* lto-streamer.h (LTO_major_version): Bump to 11.

2021-04-20  Martin Liska  <mliska@suse.cz>

	Backported from master:
	2021-04-20  Martin Liska  <mliska@suse.cz>

	* doc/invoke.texi: Fix typo.
	* params.opt: Likewise.

2021-04-20  Martin Liska  <mliska@suse.cz>

	Backported from master:
	2021-04-20  Martin Liska  <mliska@suse.cz>

	* doc/invoke.texi: Document new param.

2021-04-19  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/100081
	* gimple-range-cache.h (ranger_cache): Inherit from gori_compute
	rather than gori_compute_cache.
	* gimple-range-gori.cc (is_gimple_logical_p): Move to top of file.
	(range_def_chain::m_logical_depth): New member.
	(range_def_chain::range_def_chain): Initialize m_logical_depth.
	(range_def_chain::get_def_chain): Don't build defchains through more
	than LOGICAL_LIMIT logical expressions.
	* params.opt (param_ranger_logical_depth): New.

2021-04-19  Richard Earnshaw  <rearnsha@arm.com>

	PR target/100067
	* config/arm/arm.c (arm_configure_build_target): Do not strip
	extended FPU/SIMD feature bits from the target ISA when -mfpu
	is specified (partial revert of r11-8168).

2021-04-19  Thomas Schwinge  <thomas@codesourcery.com>

	* params.opt (-param=openacc-kernels=): Add.
	* omp-oacc-kernels-decompose.cc
	(pass_omp_oacc_kernels_decompose::gate): Use it.
	* doc/invoke.texi (-fopenacc-kernels=@var{mode}): Move...
	(--param): ... here, 'openacc-kernels'.

2021-04-19  Martin Liska  <mliska@suse.cz>

	PR c/100143
	* gengtype.c (finish_root_table): Align function arguments
	in between declaration and definition.

2021-04-19  Eric Botcazou  <ebotcazou@adacore.com>

	* config/i386/winnt.c (i386_pe_seh_cold_init): Properly deal with
	frames larger than the SEH maximum frame size.

2021-04-18  Segher Boessenkool  <segher@kernel.crashing.org>

	PR rtl-optimization/99927
	* combine.c (distribute_notes) [REG_UNUSED]: If the register already
	is dead, just drop it.

2021-04-17  Iain Buclaw  <ibuclaw@gdcproject.org>

	PR d/99914
	* config/i386/winnt-d.c (TARGET_D_TEMPLATES_ALWAYS_COMDAT): Define.
	* doc/tm.texi: Regenerate.
	* doc/tm.texi.in (D language and ABI): Add @hook for
	TARGET_D_TEMPLATES_ALWAYS_COMDAT.

2021-04-17  Iain Buclaw  <ibuclaw@gdcproject.org>

	* config/darwin-d.c (darwin_d_handle_target_object_format): New
	function.
	(darwin_d_register_target_info): New function.
	(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
	* config/dragonfly-d.c (dragonfly_d_handle_target_object_format): New
	function.
	(dragonfly_d_register_target_info): New function.
	(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
	* config/freebsd-d.c (freebsd_d_handle_target_object_format): New
	function.
	(freebsd_d_register_target_info): New function.
	(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
	* config/glibc-d.c (glibc_d_handle_target_object_format): New
	function.
	(glibc_d_register_target_info): New function.
	(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
	* config/i386/i386-d.c (ix86_d_handle_target_object_format): New
	function.
	(ix86_d_register_target_info): Add ix86_d_handle_target_object_format
	as handler for objectFormat key.
	* config/i386/winnt-d.c (winnt_d_handle_target_object_format): New
	function.
	(winnt_d_register_target_info): New function.
	(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
	* config/netbsd-d.c (netbsd_d_handle_target_object_format): New
	function.
	(netbsd_d_register_target_info): New function.
	(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
	* config/openbsd-d.c (openbsd_d_handle_target_object_format): New
	function.
	(openbsd_d_register_target_info): New function.
	(TARGET_D_REGISTER_OS_TARGET_INFO): Define.
	* config/pa/pa-d.c (pa_d_handle_target_object_format): New function.
	(pa_d_register_target_info): Add pa_d_handle_target_object_format as
	handler for objectFormat key.
	* config/rs6000/rs6000-d.c (rs6000_d_handle_target_object_format): New
	function.
	(rs6000_d_register_target_info): Add
	rs6000_d_handle_target_object_format as handler for objectFormat key.
	* config/sol2-d.c (solaris_d_handle_target_object_format): New
	function.
	(solaris_d_register_target_info): New function.
	(TARGET_D_REGISTER_OS_TARGET_INFO): Define.

2021-04-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/91710
	* config/aarch64/aarch64.c (aarch64_function_arg_alignment): Change
	abi_break argument from bool * to unsigned *, store there the pre-GCC 9
	alignment.
	(aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Adjust callers.
	(aarch64_function_arg_regno_p): Likewise.  Only emit -Wpsabi note if
	the old and new alignment after applying MIN/MAX to it is different.

2021-04-16  Tamar Christina  <tamar.christina@arm.com>

	PR target/100048
	* config/aarch64/aarch64-sve.md (@aarch64_sve_trn1_conv<mode>): New.
	* config/aarch64/aarch64.c (aarch64_expand_sve_const_pred_trn): Use new
	TRN optab.
	* config/aarch64/iterators.md (UNSPEC_TRN1_CONV): New.

2021-04-16  Bill Schmidt  <wschmidt@linux.ibm.com>

	* doc/extend.texi (PowerPC AltiVec/VSX Built-in Functions): Revise
	this section and its subsections.

2021-04-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/100075
	* config/aarch64/aarch64.md (*neg_asr_si2_extr, *extrsi5_insn_di): New
	define_insn patterns.

2021-04-16  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/98689
	* reg-notes.def (UNTYPED_CALL): New note.
	* combine.c (distribute_notes): Handle it.
	* emit-rtl.c (try_split): Likewise.
	* rtlanal.c (rtx_properties::try_to_add_insn): Likewise.  Assume
	that calls with the note implicitly set all return value registers.
	* builtins.c (expand_builtin_apply): Add a REG_UNTYPED_CALL
	to untyped_calls.

2021-04-16  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/99596
	* rtlanal.c (rtx_properties::try_to_add_insn): Don't add global
	register accesses for const calls.  Assume that pure functions
	can only read from global registers.  Ignore cases in which
	the stack pointer has been marked global.

2021-04-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/99767
	* tree-vect-loop.c (vect_transform_loop): Don't remove just
	dead scalar .MASK_LOAD calls, but also dead .COND_* calls - replace
	them by their last argument.

2021-04-15  Martin Liska  <mliska@suse.cz>

	* doc/invoke.texi: Other params don't use it, remove it.

2021-04-15  Richard Biener  <rguenther@suse.de>

	* gimple-builder.h: Add deprecation note.

2021-04-15  Richard Sandiford  <richard.sandiford@arm.com>

	PR c++/98852
	* attribs.h (restrict_type_identity_attributes_to): Declare.
	* attribs.c (restrict_type_identity_attributes_to): New function.

2021-04-15  Richard Sandiford  <richard.sandiford@arm.com>

	PR c/98852
	* attribs.h (affects_type_identity_attributes): Declare.
	* attribs.c (remove_attributes_matching): New function.
	(affects_type_identity_attributes): Likewise.

2021-04-15  Jakub Jelinek  <jakub@redhat.com>

	PR target/100056
	* config/aarch64/aarch64.md (*<LOGICAL:optab>_<SHIFT:optab><mode>3):
	Add combine splitters for *<LOGICAL:optab>_ashl<mode>3 with
	ZERO_EXTEND, SIGN_EXTEND or AND.

2021-04-14  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/99929
	* rtl.h (same_vector_encodings_p): New function.
	* cse.c (exp_equiv_p): Check that CONST_VECTORs have the same encoding.
	* cselib.c (rtx_equal_for_cselib_1): Likewise.
	* jump.c (rtx_renumbered_equal_p): Likewise.
	* lra-constraints.c (operands_match_p): Likewise.
	* reload.c (operands_match_p): Likewise.
	* rtl.c (rtx_equal_p_cb, rtx_equal_p): Likewise.

2021-04-14  Richard Sandiford  <richard.sandiford@arm.com>

	* print-rtl.c (rtx_writer::print_rtx_operand_codes_E_and_V): Print
	more information about variable-length CONST_VECTORs.

2021-04-14  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/100066
	* lra-constraints.c (split_reg): Check paradoxical_subreg_p for
	ordered modes when choosing splitting mode for hard reg.

2021-04-14  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/99246
	* config/aarch64/aarch64.c (aarch64_expand_sve_const_vector_sel):
	New function.
	(aarch64_expand_sve_const_vector): Use it for nelts_per_pattern==2.

2021-04-14  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/s390-builtins.def (O_M5, O_M12, ...): Add new macros
	for mask operand types.
	(s390_vec_permi_s64, s390_vec_permi_b64, s390_vec_permi_u64)
	(s390_vec_permi_dbl, s390_vpdi): Use the M5 type for the immediate
	operand.
	(s390_vec_msum_u128, s390_vmslg): Use the M12 type for the
	immediate operand.
	* config/s390/s390.c (s390_const_operand_ok): Check the new
	operand types and generate a list of valid values.

2021-04-14  Iain Buclaw  <ibuclaw@gdcproject.org>

	* doc/tm.texi: Regenerate.
	* doc/tm.texi.in (D language and ABI): Add @hook for
	TARGET_D_REGISTER_OS_TARGET_INFO.

2021-04-14  Iain Buclaw  <ibuclaw@gdcproject.org>

	* config/aarch64/aarch64-d.c (aarch64_d_handle_target_float_abi): New
	function.
	(aarch64_d_register_target_info): New function.
	* config/aarch64/aarch64-protos.h (aarch64_d_register_target_info):
	Declare.
	* config/aarch64/aarch64.h (TARGET_D_REGISTER_CPU_TARGET_INFO):
	Define.
	* config/arm/arm-d.c (arm_d_handle_target_float_abi): New function.
	(arm_d_register_target_info): New function.
	* config/arm/arm-protos.h (arm_d_register_target_info): Declare.
	* config/arm/arm.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
	* config/i386/i386-d.c (ix86_d_handle_target_float_abi): New function.
	(ix86_d_register_target_info): New function.
	* config/i386/i386-protos.h (ix86_d_register_target_info): Declare.
	* config/i386/i386.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
	* config/mips/mips-d.c (mips_d_handle_target_float_abi): New function.
	(mips_d_register_target_info): New function.
	* config/mips/mips-protos.h (mips_d_register_target_info): Declare.
	* config/mips/mips.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
	* config/pa/pa-d.c (pa_d_handle_target_float_abi): New function.
	(pa_d_register_target_info): New function.
	* config/pa/pa-protos.h (pa_d_register_target_info): Declare.
	* config/pa/pa.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
	* config/riscv/riscv-d.c (riscv_d_handle_target_float_abi): New
	function.
	(riscv_d_register_target_info): New function.
	* config/riscv/riscv-protos.h (riscv_d_register_target_info): Declare.
	* config/riscv/riscv.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
	* config/rs6000/rs6000-d.c (rs6000_d_handle_target_float_abi): New
	function.
	(rs6000_d_register_target_info): New function.
	* config/rs6000/rs6000-protos.h (rs6000_d_register_target_info):
	Declare.
	* config/rs6000/rs6000.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
	* config/s390/s390-d.c (s390_d_handle_target_float_abi): New function.
	(s390_d_register_target_info): New function.
	* config/s390/s390-protos.h (s390_d_register_target_info): Declare.
	* config/s390/s390.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
	* config/sparc/sparc-d.c (sparc_d_handle_target_float_abi): New
	function.
	(sparc_d_register_target_info): New function.
	* config/sparc/sparc-protos.h (sparc_d_register_target_info): Declare.
	* config/sparc/sparc.h (TARGET_D_REGISTER_CPU_TARGET_INFO): Define.
	* doc/tm.texi: Regenerate.
	* doc/tm.texi.in (D language and ABI): Add @hook for
	TARGET_D_REGISTER_CPU_TARGET_INFO.

2021-04-14  Iain Buclaw  <ibuclaw@gdcproject.org>

	* config/i386/i386-d.c (ix86_d_has_stdcall_convention): New function.
	* config/i386/i386-protos.h (ix86_d_has_stdcall_convention): Declare.
	* config/i386/i386.h (TARGET_D_HAS_STDCALL_CONVENTION): Define.
	* doc/tm.texi: Regenerate.
	* doc/tm.texi.in (D language and ABI): Add @hook for
	TARGET_D_HAS_STDCALL_CONVENTION.

2021-04-14  Richard Biener  <rguenther@suse.de>

	* tree-cfg.c (verify_gimple_assign_ternary): Verify that
	VEC_COND_EXPRs have a gimple_val condition.
	* tree-ssa-propagate.c (valid_gimple_rhs_p): VEC_COND_EXPR
	can no longer have a GENERIC condition.

2021-04-14  Richard Earnshaw  <rearnsha@arm.com>

	PR target/100067
	* config/arm/arm.c (arm_configure_build_target): Strip isa_all_fpbits
	from the isa_delta when -mfpu has been used.
	(arm_options_perform_arch_sanity_checks): It's the architecture that
	lacks an FPU not the processor.

2021-04-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/100053
	* tree-ssa-sccvn.c (vn_nary_op_get_predicated_value): Do
	not use optimistic dominance queries for backedges to validate
	predicated values.
	(dominated_by_p_w_unex): Add parameter to ignore executable
	state on backedges.
	(rpo_elim::eliminate_avail): Adjust.

2021-04-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/100028
	* config/aarch64/aarch64.md (*aarch64_bfxil<mode>_extr,
	*aarch64_bfxilsi_extrdi): New define_insn patterns.

2021-04-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/99648
	* simplify-rtx.c (simplify_immed_subreg): For MODE_COMPOSITE_P
	outermode, return NULL if the result doesn't encode back to the
	original byte sequence.
	(simplify_gen_subreg): Don't create SUBREGs from constants to
	MODE_COMPOSITE_P outermode.

2021-04-12  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/99905
	* combine.c (expand_compound_operation): If pos + len > modewidth,
	perform the right shift by pos in inner_mode and then convert to mode,
	instead of trying to simplify a shift of rtx with inner_mode by pos
	as if it was a shift in mode.

2021-04-12  Jakub Jelinek  <jakub@redhat.com>

	PR debug/99830
	* combine.c (simplify_and_const_int_1): Don't optimize varop
	away if it has side-effects.

2021-04-12  Martin Liska  <mliska@suse.cz>

	* doc/extend.texi: Escape @smallexample content.

2021-04-12  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* config/s390/s390.md ("*movdi_31", "*movdi_64"): Add
	  alternative in order to load a DFP zero.

2021-04-12  Martin Liska  <mliska@suse.cz>

	* doc/extend.texi: Be more precise in documentation
	of symver attribute.

2021-04-12  Martin Liska  <mliska@suse.cz>

	PR sanitizer/99877
	* gimplify.c (gimplify_expr): Right now, we unpoison all
	variables before a goto <dest>. We should not do it if we are
	in a omp context.

2021-04-12  Cui,Lili  <lili.cui@intel.com>

	* common/config/i386/cpuinfo.h (get_intel_cpu): Handle
	rocketlake.
	* common/config/i386/i386-common.c (processor_names): Add
	rocketlake.
	(processor_alias_table): Add rocketlake.
	* common/config/i386/i386-cpuinfo.h (processor_subtypes): Add
	INTEL_COREI7_ROCKETLAKE.
	* config.gcc: Add -march=rocketlake.
	* config/i386/i386-c.c (ix86_target_macros_internal): Handle
	rocketlake.
	* config/i386/i386-options.c (m_ROCKETLAKE)  : Define.
	(processor_cost_table): Add rocketlake cost.
	* config/i386/i386.h (ix86_size_cost) : Define
	TARGET_ROCKETLAKE.
	(processor_type) : Add PROCESSOR_ROCKETLAKE.
	(PTA_ROCKETLAKE): Ditto.
	* doc/extend.texi: Add rocketlake.
	* doc/invoke.texi: Add rocketlake.

2021-04-12  Cui,Lili  <lili.cui@intel.com>

	* config/i386/i386.h (PTA_ALDERLAKE): Change alderlake ISA list.
	* config/i386/i386-options.c (m_CORE_AVX2): Add m_ALDERLAKE.
	* common/config/i386/cpuinfo.h (get_intel_cpu): Add AlderLake model.
	* doc/invoke.texi: Change alderlake ISA list.

2021-04-11  Hafiz Abid Qadeer  <abidh@codesourcery.com>

	PR middle-end/98088
	* omp-expand.c (expand_oacc_collapse_init): Update condition in
	a gcc_assert.

2021-04-10  H.J. Lu  <hjl.tools@gmail.com>

	PR target/99744
	* config/i386/serializeintrin.h (_serialize): Defined as macro.

2021-04-10  Jakub Jelinek  <jakub@redhat.com>

	PR lto/99849
	* expr.c (expand_expr_addr_expr_1): Test is_global_var rather than
	just TREE_STATIC on COMPOUND_LITERAL_EXPR_DECLs.

2021-04-10  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/99989
	* gimple-ssa-warn-alloca.c
	(alloca_type_and_limit::alloca_type_and_limit): Initialize limit to
	0 with integer precision unconditionally.

2021-04-10  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/98601
	* rtlanal.c (rtx_addr_can_trap_p_1): Allow in assert unknown size
	not just for BLKmode, but also for VOIDmode.  For STRICT_ALIGNMENT
	unaligned_mems handle VOIDmode like BLKmode.

2021-04-10  Jan Hubicka  <hubicka@ucw.cz>

	PR lto/99857
	* tree.c (free_lang_data_in_decl): Do not release body of
	declare_variant_alt.

2021-04-09  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.c (aarch64_option_restore): If the
	architecture was specified explicitly and the tuning wasn't,
	tune for the architecture rather than the configured default CPU.

2021-04-09  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.md (tlsdesc_small_sve_<mode>): Use X30
	as the temporary register.

2021-04-09  Martin Liska  <mliska@suse.cz>

	* doc/extend.texi: Move non-target attributes on the top level.

2021-04-09  Martin Liska  <mliska@suse.cz>

	* doc/invoke.texi: Document minimum and maximum value of the
	argument for both supported compression algorithms.

2021-04-08  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/rs6000.c (rs6000_xcoff_select_section): Select
	TLS BSS before TLS data.
	* config/rs6000/xcoff.h (ASM_OUTPUT_TLS_COMMON): Use .comm.

2021-04-08  Richard Sandiford  <richard.sandiford@arm.com>

	* doc/sourcebuild.texi (stdint_types_mbig_endian): Document.

2021-04-08  Richard Sandiford  <richard.sandiford@arm.com>

	* match.pd: Extend vec_cond folds to handle shifts.

2021-04-08  Maciej W. Rozycki  <macro@orcam.me.uk>

	* config/vax/vax.md: Fix comment for `*bit<mode>' pattern's
	peephole.

2021-04-08  Alex Coplan  <alex.coplan@arm.com>

	PR target/99647
	* config/arm/iterators.md (MVE_vecs): New.
	(V_elem): Also handle V2DF.
	* config/arm/mve.md (*mve_mov<mode>): Rename to ...
	(*mve_vdup<mode>): ... this. Remove second alternative since
	vec_duplicate of const_int is not canonical RTL, and we don't
	want to match symbol_refs.
	(*mve_vec_duplicate<mode>): Delete (pattern is redundant).

2021-04-08  Xionghu Luo  <luoxhu@linux.ibm.com>

	* fold-const.c (fold_single_bit_test): Fix typo.
	* print-rtl.c (print_rtx_insn_vec): Call print_rtl_single
	instead.

2021-04-07  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/97513
	* tree-vect-slp.c (vect_add_slp_permutation): New function,
	split out from...
	(vectorizable_slp_permutation): ...here.  Detect cases in which
	all VEC_PERM_EXPRs are guaranteed to have the same stepped
	permute vector and only generate one permute vector for that case.
	Extend that case to handle variable-length vectors.

2021-04-07  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/99873
	* tree-vect-slp.c (vect_slp_prefer_store_lanes_p): New function.
	(vect_build_slp_instance): Don't split store groups that could
	use IFN_STORE_LANES.

2021-04-07  Jakub Jelinek  <jakub@redhat.com>

	PR target/99872
	* varasm.c (output_constant_pool_contents): Don't strip name encoding
	from XSTR (desc->sym, 0) or from label before passing those to
	ASM_OUTPUT_DEF.

2021-04-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99954
	* tree-loop-distribution.c: Include tree-affine.h.
	(generate_memcpy_builtin): Try using tree-affine to prove
	non-overlap.
	(loop_distribution::classify_builtin_ldst): Always classify
	as PKIND_MEMMOVE.

2021-04-07  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99947
	* tree-vect-loop.c (vectorizable_induction): Pre-allocate
	steps vector to avoid pushing elements from the reallocated
	vector.

2021-04-07  Richard Biener  <rguenther@suse.de>

	* tree-ssa-sccvn.h (print_vn_reference_ops): Declare.
	* tree-ssa-pre.c (print_pre_expr): Factor out VN reference operand
	printing...
	* tree-ssa-sccvn.c (print_vn_reference_ops): ... into this new
	function.
	(debug_vn_reference_ops): New.

2021-04-07  Bin Cheng  <bin.cheng@linux.alibaba.com>

	PR tree-optimization/98736
	* tree-loop-distribution.c
	* (loop_distribution::bb_top_order_init):
	Compute RPO with programing order preserved by calling function
	rev_post_order_and_mark_dfs_back_seme.

2021-04-06  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/99781
	* lra-constraints.c (split_reg): Don't check paradoxical_subreg_p.
	* lra-lives.c (clear_sparseset_regnos, regnos_in_sparseset_p): New
	functions.
	(process_bb_lives): Don't update biggest mode of hard reg for
	implicit in multi-register group.  Use the new functions for
	updating dead_set and unused_set by register notes.

2021-04-06  Xianmiao Qu  <xianmiao_qu@c-sky.com>

	* config/csky/csky_pipeline_ck802.md : Use insn reservation name
	instead of *.

2021-04-06  H.J. Lu  <hjl.tools@gmail.com>

	* config/i386/x86-tune-costs.h (skylake_memcpy): Updated.
	(skylake_memset): Likewise.
	(skylake_cost): Change CLEAR_RATIO to 17.
	* config/i386/x86-tune.def (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB):
	Replace m_CANNONLAKE, m_ICELAKE_CLIENT, m_ICELAKE_SERVER,
	m_TIGERLAKE and m_SAPPHIRERAPIDS with m_SKYLAKE and m_CORE_AVX512.

2021-04-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99880
	* tree-vect-loop.c (maybe_set_vectorized_backedge_value): Only
	set vectorized defs of relevant PHIs.

2021-04-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99924
	* tree-vect-slp.c (vect_bb_partition_graph_r): Do not mark
	nodes w/o scalar stmts as visited.

2021-04-06  Alex Coplan  <alex.coplan@arm.com>

	PR target/99748
	* config/arm/arm.c (arm_libcall_uses_aapcs_base): Also use base
	PCS for [su]fix_optab.

2021-04-03  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.c (machopic_legitimize_pic_address): Check
	that the current pic register is one of the hard reg set
	before setting liveness.

2021-04-03  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.c (machopic_legitimize_pic_address): Fix
	whitespace, remove unused code.

2021-04-03  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/99882
	* gimple-ssa-store-merging.c (bswap_view_convert): Handle val with
	pointer type.

2021-04-03  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/99863
	* dse.c (replace_read): Drop regs_live argument.  Instead of
	regs_live, use store_insn->fixed_regs_live if non-NULL,
	otherwise punt if insns sequence clobbers or sets any hard
	registers.

2021-04-03  Jakub Jelinek  <jakub@redhat.com>

	PR testsuite/98125
	* targhooks.h (default_print_patchable_function_entry_1): Declare.
	* targhooks.c (default_print_patchable_function_entry_1): New function,
	copied from default_print_patchable_function_entry with an added flags
	argument.
	(default_print_patchable_function_entry): Rewritten into a small
	wrapper around default_print_patchable_function_entry_1.
	* config/rs6000/rs6000.c (TARGET_ASM_PRINT_PATCHABLE_FUNCTION_ENTRY):
	Redefine.
	(rs6000_print_patchable_function_entry): New function.

2021-04-02  Eric Botcazou  <ebotcazou@adacore.com>

	* doc/invoke.texi (fdelete-dead-exceptions): Minor tweak.

2021-04-01  Jason Merrill  <jason@redhat.com>

	PR c++/98481
	* common.opt: Document v15 and v16.

2021-04-01  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99863
	* gimplify.c (gimplify_init_constructor): Recompute vector
	constructor flags.

2021-04-01  Jakub Jelinek  <jakub@redhat.com>

	* doc/extend.texi (symver attribute): Fix up syntax errors
	in the examples.

2021-04-01  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/96573
	* gimple-ssa-store-merging.c (init_symbolic_number): Handle
	also pointer types.

2021-04-01  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99856
	* tree-vect-patterns.c (vect_recog_over_widening_pattern): Promote
	precision to vector element precision.

2021-04-01  Martin Jambor  <mjambor@suse.cz>

	PR tree-optimization/97009
	* tree-sra.c (access_or_its_child_written): New function.
	(propagate_subaccesses_from_rhs): Use it instead of a simple grp_write
	test.

2021-03-31  Jan Hubicka  <hubicka@ucw.cz>

	PR ipa/98265
	* cif-code.def (USES_COMDAT_LOCAL): Make CIF_FINAL_NORMAL.

2021-03-31  Pat Haugen  <pthaugen@linux.ibm.com>

	PR target/99133
	* config/rs6000/altivec.md (xxspltiw_v4si, xxspltiw_v4sf_inst,
	xxspltidp_v2df_inst, xxsplti32dx_v4si_inst, xxsplti32dx_v4sf_inst,
	xxblend_<mode>, xxpermx_inst, xxeval): Mark prefixed.
	* config/rs6000/mma.md (mma_<vvi4i4i8>, mma_<avvi4i4i8>,
	mma_<vvi4i4i2>, mma_<avvi4i4i2>, mma_<vvi4i4>, mma_<avvi4i4>,
	mma_<pvi4i2>, mma_<apvi4i2>, mma_<vvi4i4i4>, mma_<avvi4i4i4>):
	Likewise.
	* config/rs6000/rs6000.c (rs6000_final_prescan_insn): Adjust test.
	* config/rs6000/rs6000.md (define_attr "maybe_prefixed"): New.
	(define_attr "prefixed"): Update initializer.

2021-03-31  Jakub Jelinek  <jakub@redhat.com>

	PR debug/99490
	* dwarf2out.c (debug_ranges_dwo_section): New variable.
	(DW_RANGES_IDX_SKELETON): Define.
	(struct dw_ranges): Add begin_entry and end_entry members.
	(DEBUG_DWO_RNGLISTS_SECTION): Define.
	(add_ranges_num): Adjust r initializer for addition of *_entry
	members.
	(add_ranges_by_labels): For -gsplit-dwarf and force_direct,
	set idx to DW_RANGES_IDX_SKELETON.
	(use_distinct_base_address_for_range): New function.
	(index_rnglists): Don't set r->idx if it is equal to
	DW_RANGES_IDX_SKELETON.  Initialize r->begin_entry and
	r->end_entry for -gsplit-dwarf if those will be needed by
	output_rnglists.
	(output_rnglists): Add DWO argument.  If true, switch to
	debug_ranges_dwo_section rather than debug_ranges_section.
	Adjust l1/l2 label indexes.  Only output the offset table when
	dwo is true and don't include in there the skeleton range
	entry if present.  For -gsplit-dwarf, skip ranges that belong
	to the other rnglists section.  Change return type from void
	to bool and return true if there are any range entries for
	the other section.  For dwarf_split_debug_info use
	DW_RLE_startx_endx, DW_RLE_startx_length and DW_RLE_base_addressx
	entries instead of DW_RLE_start_end, DW_RLE_start_length and
	DW_RLE_base_address.  Use use_distinct_base_address_for_range.
	(init_sections_and_labels): Initialize debug_ranges_dwo_section
	if -gsplit-dwarf and DWARF >= 5.  Adjust ranges_section_label
	and range_base_label indexes.
	(dwarf2out_finish): Call index_rnglists earlier before finalizing
	.debug_addr.  Never emit DW_AT_rnglists_base attribute.  For
	-gsplit-dwarf and DWARF >= 5 call output_rnglists up to twice
	with different dwo arguments.
	(dwarf2out_c_finalize): Clear debug_ranges_dwo_section.

2021-03-31  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/98268
	* gimple-fold.c (maybe_canonicalize_mem_ref_addr): Call
	recompute_tree_invariant_for_addr_expr after successfully
	folding a TARGET_MEM_REF that occurs inside an ADDR_EXPR.

2021-03-31  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/99726
	* tree-data-ref.c (create_intersect_range_checks_index): Bail
	out if there is more than one access function SCEV for the loop
	being versioned.

2021-03-31  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/97141
	PR rtl-optimization/98726
	* emit-rtl.c (valid_for_const_vector_p): Return true for
	CONST_POLY_INT_P.
	* rtx-vector-builder.h (rtx_vector_builder::step): Return a
	poly_wide_int instead of a wide_int.
	(rtx_vector_builder::apply_set): Take a poly_wide_int instead
	of a wide_int.
	* rtx-vector-builder.c (rtx_vector_builder::apply_set): Likewise.
	* config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Return
	false for CONST_VECTORs that cannot be forced to memory.
	* config/aarch64/aarch64-simd.md (mov<mode>): If a CONST_VECTOR
	is too complex to force to memory, build it up from individual
	elements instead.

2021-03-31  Jan Hubicka  <jh@suse.cz>

	PR lto/99447
	* cgraph.c (cgraph_node::release_body): Fix overactive check.

2021-03-31  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/99786
	* config/arm/vec-common.md (mul<mode>3): Disable on iwMMXT, expect
	for V4HI and V2SI.

2021-03-31  H.J. Lu  <hjl.tools@gmail.com>

	* config/i386/i386-expand.c (expand_set_or_cpymem_via_rep):
	For TARGET_PREFER_KNOWN_REP_MOVSB_STOSB, don't convert QImode
	to SImode.
	(decide_alg): For TARGET_PREFER_KNOWN_REP_MOVSB_STOSB, use
	"rep movsb/stosb" only for known sizes.
	* config/i386/i386-options.c (processor_cost_table): Use Ice
	Lake cost for Cannon Lake, Ice Lake, Tiger Lake, Sapphire
	Rapids and Alder Lake.
	* config/i386/i386.h (TARGET_PREFER_KNOWN_REP_MOVSB_STOSB): New.
	* config/i386/x86-tune-costs.h (icelake_memcpy): New.
	(icelake_memset): Likewise.
	(icelake_cost): Likewise.
	* config/i386/x86-tune.def (X86_TUNE_PREFER_KNOWN_REP_MOVSB_STOSB):
	New.

2021-03-31  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/98119
	* config/aarch64/aarch64.c
	(aarch64_vectorize_preferred_vector_alignment): Query the size
	of the provided SVE vector; do not assume that all SVE vectors
	have the same size.

2021-03-31  Jan Hubicka  <jh@suse.cz>

	PR lto/99447
	* cgraph.c (cgraph_node::release_body): Remove all callers and
	references.
	* cgraphclones.c (cgraph_node::materialize_clone): Do not do it here.
	* cgraphunit.c (cgraph_node::expand): And here.

2021-03-31  Martin Liska  <mliska@suse.cz>

	* ipa-modref.c (analyze_ssa_name_flags): Fix coding style
	and one negated condition.

2021-03-31  Jakub Jelinek  <jakub@redhat.com>
	    Richard Sandiford  <richard.sandiford@arm.com>

	PR target/99813
	* config/aarch64/aarch64.md (*add<mode>3_poly_1): Swap Uai and Uav
	constraints on operands[2] and similarly 0 and rk constraints
	on operands[1] corresponding to that.

2021-03-31  Jakub Jelinek  <jakub@redhat.com>

	PR bootstrap/98860
	* configure.ac (HAVE_LD_BROKEN_PE_DWARF5): New AC_DEFINE if PECOFF
	linker doesn't support DWARF sections new in DWARF5.
	* config/i386/i386-options.c (ix86_option_override_internal): Default
	to dwarf_version 4 if HAVE_LD_BROKEN_PE_DWARF5 for TARGET_PECOFF
	targets.
	* config.in: Regenerated.
	* configure: Regenerated.

2021-03-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	PR target/99820
	* config/aarch64/aarch64.c (aarch64_analyze_loop_vinfo): Check for
	available issue_info before using it.

2021-03-30  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	PR target/99822
	* config/aarch64/aarch64.md (sub<mode>3_compare1_imm): Do not allow zero
	in operand 1.

2021-03-30  Xionghu Luo  <luoxhu@linux.ibm.com>

	PR target/99718
	* config/rs6000/altivec.md (altivec_lvsl_reg): Change to ...
	(altivec_lvsl_reg_<mode>): ... this.
	(altivec_lvsr_reg): Change to ...
	(altivec_lvsr_reg_<mode>): ... this.
	* config/rs6000/predicates.md (vec_set_index_operand): New.
	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
	Enable 32bit variable vec_insert for all TARGET_VSX.
	* config/rs6000/rs6000.c (rs6000_expand_vector_set_var_p9):
	Enable 32bit variable vec_insert for p9 and above.
	(rs6000_expand_vector_set_var_p8): Rename to ...
	(rs6000_expand_vector_set_var_p7): ... this.
	(rs6000_expand_vector_set): Use TARGET_VSX and adjust assert
	position.
	* config/rs6000/vector.md (vec_set<mode>): Use vec_set_index_operand.
	* config/rs6000/vsx.md (xl_len_r): Use gen_altivec_lvsl_reg_di and
	gen_altivec_lvsr_reg_di.

2021-03-30  H.J. Lu  <hjl.tools@gmail.com>

	PR target/99744
	* config/i386/ia32intrin.h (__rdtsc): Defined as macro.
	(__rdtscp): Likewise.

2021-03-30  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/99825
	* tree-vect-slp-patterns.c (vect_check_evenodd_blend):
	Reject non-mult 2 lanes.

2021-03-30  Richard Earnshaw  <rearnsha@arm.com>

	PR target/99773
	* config/arm/arm.c (arm_file_start): Fix emission of
	Tag_ABI_VFP_args attribute.

2021-03-30  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99824
	* stor-layout.c (set_min_and_max_values_for_integral_type):
	Assert the precision is within the bounds of
	WIDE_INT_MAX_PRECISION.
	* tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Use
	the outermost component ref only to lower the access size
	and initialize that from the access type.

2021-03-30  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/98136
	* config/aarch64/aarch64.md (mov<mode>): Pass multi-instruction
	CONST_INTs to aarch64_expand_mov_immediate when called after RA.

2021-03-30  Mihailo Stojanovic  <mihailo.stojanovic@typhoon-hil.com>

	* config/aarch64/aarch64.md
	(<optab>_trunc<fcvt_target><GPI:mode>2): Set the "arch"
	attribute to disambiguate between SIMD and FP variants of the
	instruction.

2021-03-29  Jan Hubicka  <hubicka@ucw.cz>

	* ipa-modref.c (merge_call_lhs_flags): Correct handling of deref.
	(analyze_ssa_name_flags): Fix typo in comment.

2021-03-29  Alex Coplan  <alex.coplan@arm.com>

	PR target/99216
	* config/aarch64/aarch64-sve-builtins.cc
	(function_builder::add_function): Add placeholder_p argument, use
	placeholder decls if this is set.
	(function_builder::add_unique_function): Instead of conditionally adding
	direct overloads, unconditionally add either a direct overload or a
	placeholder.
	(function_builder::add_overloaded_function): Set placeholder_p if we're
	using C++ overloads. Use the obstack for string storage instead
	of relying on the tree nodes.
	(function_builder::add_overloaded_functions): Don't return early for
	m_direct_overloads: we need to add placeholders.
	* config/aarch64/aarch64-sve-builtins.h
	(function_builder::add_function): Add placeholder_p argument.

2021-03-29  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99807
	* tree-vect-slp.c (vect_slp_analyze_node_operations_1): Move
	assert below VEC_PERM handling.

2021-03-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	PR target/99037
	* config/aarch64/aarch64-simd.md (move_lo_quad_internal_<mode>): Use
	aarch64_simd_or_scalar_imm_zero to match zeroes.  Remove pattern
	matching const_int 0.
	(move_lo_quad_internal_be_<mode>): Likewise.
	(move_lo_quad_<mode>): Update for the above.
	* config/aarch64/iterators.md (VQ_2E): Delete.

2021-03-29  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/99777
	* fold-const.c (extract_muldiv_1): For conversions, punt on casts from
	types other than scalar integral types.

2021-03-28  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/rs6000.c (rs6000_output_dwarf_dtprel): Do not add
	XCOFF TLS reloc decorations.

2021-03-28  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/analyzer.texi (Analyzer Internals): Update link to
	"A Memory Model for Static Analysis of C Programs".

2021-03-26  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/aix.h (ADJUST_FIELD_ALIGN): Call function.
	* config/rs6000/rs6000-protos.h (rs6000_special_adjust_field_align):
	Declare.
	* config/rs6000/rs6000.c (rs6000_special_adjust_field_align): New.
	(rs6000_special_round_type_align): Recursively check innermost first
	field.

2021-03-26  Jakub Jelinek  <jakub@redhat.com>

	PR debug/99334
	* dwarf2out.h (struct dw_fde_node): Add rule18 member.
	* dwarf2cfi.c (dwarf2out_frame_debug_expr): When handling (set hfp sp)
	assignment with drap_reg active, queue reg save for hfp with offset 0
	and flush queued reg saves.  When handling a push with rule18,
	defer queueing reg save for hfp and just assert the offset is 0.
	(scan_trace): Assert that fde->rule18 is false.

2021-03-26  Vladimir Makarov  <vmakarov@redhat.com>

	PR target/99766
	* ira-costs.c (record_reg_classes): Put case with
	CT_RELAXED_MEMORY adjacent to one with CT_MEMORY.
	* ira.c (ira_setup_alts): Ditto.
	* lra-constraints.c (process_alt_operands): Ditto.
	* recog.c (asm_operand_ok): Ditto.
	* reload.c (find_reloads): Ditto.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-protos.h
	(cpu_addrcost_table::post_modify_ld3_st3): New member variable.
	(cpu_addrcost_table::post_modify_ld4_st4): Likewise.
	* config/aarch64/aarch64.c (generic_addrcost_table): Update
	accordingly, using the same costs as for post_modify.
	(exynosm1_addrcost_table, xgene1_addrcost_table): Likewise.
	(thunderx2t99_addrcost_table, thunderx3t110_addrcost_table):
	(tsv110_addrcost_table, qdf24xx_addrcost_table): Likewise.
	(a64fx_addrcost_table): Likewise.
	(neoversev1_addrcost_table): New.
	(neoversev1_tunings): Use neoversev1_addrcost_table.
	(aarch64_address_cost): Use the new post_modify costs for CImode
	and XImode.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.opt
	(-param=aarch64-loop-vect-issue-rate-niters=): New parameter.
	* doc/invoke.texi: Document it.
	* config/aarch64/aarch64-protos.h (aarch64_base_vec_issue_info)
	(aarch64_scalar_vec_issue_info, aarch64_simd_vec_issue_info)
	(aarch64_advsimd_vec_issue_info, aarch64_sve_vec_issue_info)
	(aarch64_vec_issue_info): New structures.
	(cpu_vector_cost): Write comments above the variables rather
	than to the side.
	(cpu_vector_cost::issue_info): New member variable.
	* config/aarch64/aarch64.c: Include gimple-pretty-print.h
	and tree-ssa-loop-niter.h.
	(generic_vector_cost, a64fx_vector_cost, qdf24xx_vector_cost)
	(thunderx_vector_cost, tsv110_vector_cost, cortexa57_vector_cost)
	(exynosm1_vector_cost, xgene1_vector_cost, thunderx2t99_vector_cost)
	(thunderx3t110_vector_cost): Initialize issue_info to null.
	(neoversev1_scalar_issue_info, neoversev1_advsimd_issue_info)
	(neoversev1_sve_issue_info, neoversev1_vec_issue_info): New structures.
	(neoversev1_vector_cost): Use them.
	(aarch64_vec_op_count, aarch64_sve_op_count): New structures.
	(aarch64_vector_costs::saw_sve_only_op): New member variable.
	(aarch64_vector_costs::num_vector_iterations): Likewise.
	(aarch64_vector_costs::scalar_ops): Likewise.
	(aarch64_vector_costs::advsimd_ops): Likewise.
	(aarch64_vector_costs::sve_ops): Likewise.
	(aarch64_vector_costs::seen_loads): Likewise.
	(aarch64_simd_vec_costs_for_flags): New function.
	(aarch64_analyze_loop_vinfo): Initialize num_vector_iterations.
	Count the number of predicate operations required by SVE WHILE
	instructions.
	(aarch64_comparison_type, aarch64_multiply_add_p): New functions.
	(aarch64_sve_only_stmt_p, aarch64_in_loop_reduction_latency): Likewise.
	(aarch64_count_ops): Likewise.
	(aarch64_add_stmt_cost): Record whether see an SVE operation
	that cannot currently be implementing using Advanced SIMD.
	Record issue information about the scalar, Advanced SIMD
	and (where relevant) SVE versions of a loop.
	(aarch64_vec_op_count::dump): New function.
	(aarch64_sve_op_count::dump): Likewise.
	(aarch64_estimate_min_cycles_per_iter): Likewise.
	(aarch64_adjust_body_cost): If issue information is available,
	try to compare the issue rates of the various loop implementations
	and increase or decrease the vector body cost accordingly.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.c (aarch64_detect_vector_stmt_subtype):
	Assume a zero cost for induction phis.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.c (aarch64_embedded_comparison_type): New
	function.
	(aarch64_adjust_stmt_cost): Add the costs of embedded scalar and
	vector comparisons.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.c (aarch64_detect_scalar_stmt_subtype):
	New function.
	(aarch64_add_stmt_cost): Call it.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-tuning-flags.def (matched_vector_throughput):
	New tuning parameter.
	* config/aarch64/aarch64.c (neoversev1_tunings): Use it.
	(aarch64_estimated_sve_vq): New function.
	(aarch64_vector_costs::analyzed_vinfo): New member variable.
	(aarch64_vector_costs::is_loop): Likewise.
	(aarch64_vector_costs::unrolled_advsimd_niters): Likewise.
	(aarch64_vector_costs::unrolled_advsimd_stmts): Likewise.
	(aarch64_record_potential_advsimd_unrolling): New function.
	(aarch64_analyze_loop_vinfo, aarch64_analyze_bb_vinfo): Likewise.
	(aarch64_add_stmt_cost): Call aarch64_analyze_loop_vinfo or
	aarch64_analyze_bb_vinfo on the first use of a costs structure.
	Detect whether we're vectorizing a loop for SVE that might be
	completely unrolled if it used Advanced SIMD instead.
	(aarch64_adjust_body_cost_for_latency): New function.
	(aarch64_finish_cost): Call it.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.c (aarch64_vector_costs): New structure.
	(aarch64_init_cost): New function.
	(aarch64_add_stmt_cost): Use aarch64_vector_costs instead of
	the default unsigned[3].
	(aarch64_finish_cost, aarch64_destroy_cost_data): New functions.
	(TARGET_VECTORIZE_INIT_COST): Override.
	(TARGET_VECTORIZE_FINISH_COST): Likewise.
	(TARGET_VECTORIZE_DESTROY_COST_DATA): Likewise.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.c (neoversev1_advsimd_vector_cost)
	(neoversev1_sve_vector_cost): New cost structures.
	(neoversev1_vector_cost): Likewise.
	(neoversev1_tunings): Use them.  Enable use_new_vector_costs.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-protos.h
	(sve_vec_cost::scatter_store_elt_cost): New member variable.
	* config/aarch64/aarch64.c (generic_sve_vector_cost): Update
	accordingly, taking the cost from the cost of a scalar_store.
	(a64fx_sve_vector_cost): Likewise.
	(aarch64_detect_vector_stmt_subtype): Detect scatter stores.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-protos.h
	(simd_vec_cost::store_elt_extra_cost): New member variable.
	* config/aarch64/aarch64.c (generic_advsimd_vector_cost): Update
	accordingly, using the vec_to_scalar cost for the new field.
	(generic_sve_vector_cost, a64fx_advsimd_vector_cost): Likewise.
	(a64fx_sve_vector_cost, qdf24xx_advsimd_vector_cost): Likewise.
	(thunderx_advsimd_vector_cost, tsv110_advsimd_vector_cost): Likewise.
	(cortexa57_advsimd_vector_cost, exynosm1_advsimd_vector_cost)
	(xgene1_advsimd_vector_cost, thunderx2t99_advsimd_vector_cost)
	(thunderx3t110_advsimd_vector_cost): Likewise.
	(aarch64_detect_vector_stmt_subtype): Detect single-element stores.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-protos.h (simd_vec_cost::ld2_st2_permute_cost)
	(simd_vec_cost::ld3_st3_permute_cost): New member variables.
	(simd_vec_cost::ld4_st4_permute_cost): Likewise.
	* config/aarch64/aarch64.c (generic_advsimd_vector_cost): Update
	accordingly, using zero for the new costs.
	(generic_sve_vector_cost, a64fx_advsimd_vector_cost): Likewise.
	(a64fx_sve_vector_cost, qdf24xx_advsimd_vector_cost): Likewise.
	(thunderx_advsimd_vector_cost, tsv110_advsimd_vector_cost): Likewise.
	(cortexa57_advsimd_vector_cost, exynosm1_advsimd_vector_cost)
	(xgene1_advsimd_vector_cost, thunderx2t99_advsimd_vector_cost)
	(thunderx3t110_advsimd_vector_cost): Likewise.
	(aarch64_ld234_st234_vectors): New function.
	(aarch64_adjust_stmt_cost): Likewise.
	(aarch64_add_stmt_cost): Call aarch64_adjust_stmt_cost if using
	the new vector costs.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-protos.h (sve_vec_cost): Turn into a
	derived class of simd_vec_cost.  Add information about CLAST[AB]
	and FADDA instructions.
	* config/aarch64/aarch64.c (generic_sve_vector_cost): Update
	accordingly, using the vec_to_scalar costs for the new fields.
	(a64fx_sve_vector_cost): Likewise.
	(aarch64_reduc_type): New function.
	(aarch64_sve_in_loop_reduction_latency): Likewise.
	(aarch64_detect_vector_stmt_subtype): Take a vinfo parameter.
	Use aarch64_sve_in_loop_reduction_latency to handle SVE reductions
	that occur in the loop body.
	(aarch64_add_stmt_cost): Update call accordingly.

2021-03-26  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-tuning-flags.def (use_new_vector_costs):
	New tuning flag.
	* config/aarch64/aarch64-protos.h (simd_vec_cost): Put comments
	above the fields rather than to the right.
	(simd_vec_cost::reduc_i8_cost): New member variable.
	(simd_vec_cost::reduc_i16_cost): Likewise.
	(simd_vec_cost::reduc_i32_cost): Likewise.
	(simd_vec_cost::reduc_i64_cost): Likewise.
	(simd_vec_cost::reduc_f16_cost): Likewise.
	(simd_vec_cost::reduc_f32_cost): Likewise.
	(simd_vec_cost::reduc_f64_cost): Likewise.
	* config/aarch64/aarch64.c (generic_advsimd_vector_cost): Update
	accordingly, using the vec_to_scalar_cost for the new fields.
	(generic_sve_vector_cost, a64fx_advsimd_vector_cost): Likewise.
	(a64fx_sve_vector_cost, qdf24xx_advsimd_vector_cost): Likewise.
	(thunderx_advsimd_vector_cost, tsv110_advsimd_vector_cost): Likewise.
	(cortexa57_advsimd_vector_cost, exynosm1_advsimd_vector_cost)
	(xgene1_advsimd_vector_cost, thunderx2t99_advsimd_vector_cost)
	(thunderx3t110_advsimd_vector_cost): Likewise.
	(aarch64_use_new_vector_costs_p): New function.
	(aarch64_simd_vec_costs): New function, split out from...
	(aarch64_builtin_vectorization_cost): ...here.
	(aarch64_is_reduction): New function.
	(aarch64_detect_vector_stmt_subtype): Likewise.
	(aarch64_add_stmt_cost): Call aarch64_detect_vector_stmt_subtype if
	using the new vector costs.

2021-03-26  Iain Buclaw  <ibuclaw@gdcproject.org>

	PR ipa/99466
	* tree-emutls.c (get_emutls_init_templ_addr): Mark initializer of weak
	TLS declarations as public.

2021-03-26  Iain Buclaw  <ibuclaw@gdcproject.org>

	* config/aarch64/aarch64-d.c (IN_TARGET_CODE): Define.
	* config/arm/arm-d.c (IN_TARGET_CODE): Likewise.
	* config/i386/i386-d.c (IN_TARGET_CODE): Likewise.
	* config/mips/mips-d.c (IN_TARGET_CODE): Likewise.
	* config/pa/pa-d.c (IN_TARGET_CODE): Likewise.
	* config/riscv/riscv-d.c (IN_TARGET_CODE): Likewise.
	* config/rs6000/rs6000-d.c (IN_TARGET_CODE): Likewise.
	* config/s390/s390-d.c (IN_TARGET_CODE): Likewise.
	* config/sparc/sparc-d.c (IN_TARGET_CODE): Likewise.

2021-03-26  Iain Buclaw  <ibuclaw@gdcproject.org>

	PR d/91595
	* config.gcc (*-*-cygwin*): Add winnt-d.o
	(*-*-mingw*): Likewise.
	* config/i386/cygwin.h (EXTRA_TARGET_D_OS_VERSIONS): New macro.
	* config/i386/mingw32.h (EXTRA_TARGET_D_OS_VERSIONS): Likewise.
	* config/i386/t-cygming: Add winnt-d.o.
	* config/i386/winnt-d.c: New file.

2021-03-26  Iain Buclaw  <ibuclaw@gdcproject.org>

	* config/freebsd-d.c: Include memmodel.h.

2021-03-26  Iain Buclaw  <ibuclaw@gdcproject.org>

	PR d/99691
	* config.gcc (*-*-openbsd*): Add openbsd-d.o.
	* config/t-openbsd: Add openbsd-d.o.
	* config/openbsd-d.c: New file.

2021-03-25  Stam Markianos-Wright  <stam.markianos-wright@arm.com>

	PR tree-optimization/96974
	* tree-vect-stmts.c (vect_get_vector_types_for_stmt): Replace assert
	with graceful exit.

2021-03-25  H.J. Lu  <hjl.tools@gmail.com>

	Revert:
	2021-03-25  H.J. Lu  <hjl.tools@gmail.com>

	PR target/98209
	PR target/99744
	* config/i386/i386.c (ix86_can_inline_p): Don't check ISA for
	always_inline in system headers.

2021-03-25  Kewen Lin  <linkw@linux.ibm.com>

	* tree-vect-loop.c (vect_model_reduction_cost): Init inside_cost.

2021-03-25  Jakub Jelinek  <jakub@redhat.com>

	PR c++/99565
	* tree-core.h (enum operand_equal_flag): Add OEP_ADDRESS_OF_SAME_FIELD.
	* fold-const.c (operand_compare::operand_equal_p): Don't compare
	field offsets if OEP_ADDRESS_OF_SAME_FIELD.

2021-03-25  H.J. Lu  <hjl.tools@gmail.com>

	PR target/98209
	PR target/99744
	* config/i386/i386.c (ix86_can_inline_p): Don't check ISA for
	always_inline in system headers.

2021-03-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99746
	* tree-vect-slp-patterns.c (complex_pattern::build): Do not mark
	the scalar stmt as patterned.  Instead set up required things
	manually.

2021-03-25  Xionghu Luo  <luoxhu@linux.ibm.com>

	* config/rs6000/rs6000.c (power8_costs): Change l2 cache
	from 256 to 512.

2021-03-24  Martin Liska  <mliska@suse.cz>

	PR target/99753
	* common/config/i386/i386-common.c (ARRAY_SIZE): Fix off-by-one
	error.
	* config/i386/i386-options.c (ix86_option_override_internal):
	Add run-time assert.

2021-03-24  Martin Jambor  <mjambor@suse.cz>

	PR ipa/99122
	* ipa-cp.c (initialize_node_lattices): Mark as bottom all
	parameters with unknown type.
	(ipacp_value_safe_for_type): New function.
	(propagate_vals_across_arith_jfunc): Verify that the constant type
	can be used for a type of the formal parameter.
	(propagate_vals_across_ancestor): Likewise.
	(propagate_scalar_across_jump_function): Likewise.  Pass the type
	also to propagate_vals_across_ancestor.

2021-03-24  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/99727
	* config/arm/mve.md (movmisalign<mode>_mve_store): Use Ux
	constraint.
	(movmisalign<mode>_mve_load): Likewise.

2021-03-24  Jakub Jelinek  <jakub@redhat.com>

	PR target/99724
	* config/arm/vec-common.md (one_cmpl<mode>2, neg<mode>2,
	movmisalign<mode>): Disable expanders for TARGET_REALLY_IWMMXT.

2021-03-24  Alexandre Oliva  <oliva@adacore.com>

	* doc/sourcebuild.texi (sysconf): New effective target.

2021-03-24  Alexandre Oliva  <oliva@adacore.com>

	* config/i386/predicates.md (reg_or_const_vec_operand): New.
	* config/i386/sse.md (ssse3_pshufbv8qi3): Add an expander for
	the now *-prefixed insn_and_split, turn the splitter const vec
	into an input for the insn, making it an ignored immediate for
	non-split cases, and loaded into the scratch register
	otherwise.

2021-03-23  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/99581
	* config/aarch64/constraints.md (Utq, UOb, UOh, UOw, UOd, UOty):
	Use define_relaxed_memory_constraint for them.

2021-03-23  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/99733
	* config/host-darwin.c (darwin_gt_pch_use_address): Add a
	colon to the diagnostic message.

2021-03-23  Ilya Leoshkevich  <iii@linux.ibm.com>

	* fwprop.c (fwprop_propagation::fwprop_propagation): Look at
	set_info's uses.
	(try_fwprop_subst_note): Use set_info instead of insn_info.
	(try_fwprop_subst_pattern): Likewise.
	(try_fwprop_subst_notes): Likewise.
	(try_fwprop_subst): Likewise.
	(forward_propagate_subreg): Likewise.
	(forward_propagate_and_simplify): Likewise.
	(forward_propagate_into): Likewise.
	* rtl-ssa/accesses.h (set_info::single_nondebug_use) New
	method.
	(set_info::single_nondebug_insn_use): Likewise.
	(set_info::single_phi_use): Likewise.
	* rtl-ssa/member-fns.inl (set_info::single_nondebug_use) New
	method.
	(set_info::single_nondebug_insn_use): Likewise.
	(set_info::single_phi_use): Likewise.

2021-03-23  Christophe Lyon  <christophe.lyon@linaro.org>

	* doc/sourcebuild.texi (arm_dsp_ok, arm_dsp): Document.

2021-03-23  Jakub Jelinek  <jakub@redhat.com>

	PR target/99540
	* config/aarch64/aarch64.c (aarch64_add_offset): Tell
	expand_mult to perform an unsigned rather than a signed
	multiplication.

2021-03-23  H.J. Lu  <hjl.tools@gmail.com>

	PR target/99704
	* config/i386/cpuid.h (__cpuid): Add __volatile__.
	(__cpuid_count): Likewise.

2021-03-23  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99721
	* tree-vect-slp.c (vect_slp_analyze_node_operations):
	Make sure we can schedule the node.

2021-03-23  Marcus Comstedt  <marcus@mc.pp.se>

	* config/riscv/riscv.c (riscv_subword): Take endianness into
	account when calculating the byte offset.

2021-03-23  Marcus Comstedt  <marcus@mc.pp.se>

	* config/riscv/predicates.md (subreg_lowpart_operator): New predicate
	* config/riscv/riscv.md (*addsi3_extended2, *subsi3_extended2)
	(*negsi2_extended2, *mulsi3_extended2, *<optab>si3_mask)
	(*<optab>si3_mask_1, *<optab>di3_mask, *<optab>di3_mask_1)
	(*<optab>si3_extend_mask, *<optab>si3_extend_mask_1): Use
	new predicate "subreg_lowpart_operator"

2021-03-23  Marcus Comstedt  <marcus@mc.pp.se>

	* config/riscv/riscv.c (riscv_swap_instruction): New function
	to byteswap an SImode rtx containing an instruction.
	(riscv_trampoline_init): Byteswap the generated instructions
	when needed.

2021-03-23  Marcus Comstedt  <marcus@mc.pp.se>

	* common/config/riscv/riscv-common.c
	(TARGET_DEFAULT_TARGET_FLAGS): Set default endianness.
	* config.gcc (riscv32be-*, riscv64be-*): Set
	TARGET_BIG_ENDIAN_DEFAULT to 1.
	* config/riscv/elf.h (LINK_SPEC): Change -melf* value
	depending on default endianness.
	* config/riscv/freebsd.h (LINK_SPEC): Likewise.
	* config/riscv/linux.h (LINK_SPEC): Likewise.
	* config/riscv/riscv.c (TARGET_DEFAULT_TARGET_FLAGS): Set
	default endianness.
	* config/riscv/riscv.h (DEFAULT_ENDIAN_SPEC): New macro.

2021-03-23  Marcus Comstedt  <marcus@mc.pp.se>

	* config/riscv/elf.h (LINK_SPEC): Pass linker endianness flag.
	* config/riscv/freebsd.h (LINK_SPEC): Likewise.
	* config/riscv/linux.h (LINK_SPEC): Likewise.
	* config/riscv/riscv.h (ASM_SPEC): Pass -mbig-endian and
	-mlittle-endian.
	(BYTES_BIG_ENDIAN): Handle big endian.
	(WORDS_BIG_ENDIAN): Define to BYTES_BIG_ENDIAN.
	* config/riscv/riscv.opt (-mbig-endian, -mlittle-endian): New
	options.
	* doc/invoke.texi (-mbig-endian, -mlittle-endian): Document.

2021-03-23  Stefan Schulze Frielinghaus  <stefansf@linux.ibm.com>

	* regcprop.c (find_oldest_value_reg): Ask target whether
	  different mode is fine for replacement register.

2021-03-23  Aldy Hernandez  <aldyh@redhat.com>

	PR tree-optimization/99296
	* value-range.cc (irange::irange_set_1bit_anti_range): New.
	(irange::irange_set_anti_range): Call irange_set_1bit_anti_range
	* value-range.h (irange::irange_set_1bit_anti_range): New.

2021-03-22  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/99581
	* config/aarch64/constraints.md (UtQ): Use
	define_relaxed_memory_constraint for it.
	* doc/md.texi (define_relaxed_memory_constraint): Describe it.
	* genoutput.c (main): Process DEFINE_RELAXED_MEMORY_CONSTRAINT.
	* genpreds.c (constraint_data): Add bitfield is_relaxed_memory.
	(have_relaxed_memory_constraints): New static var.
	(relaxed_memory_start, relaxed_memory_end): Ditto.
	(add_constraint): Add arg is_relaxed_memory.  Check name for
	relaxed memory.  Set up is_relaxed_memory in constraint_data and
	have_relaxed_memory_constraints.  Adjust calls.
	(choose_enum_order): Process relaxed memory.
	(write_tm_preds_h): Ditto.
	(main): Process DEFINE_RELAXED_MEMORY_CONSTRAINT.
	* gensupport.c (process_rtx): Process DEFINE_RELAXED_MEMORY_CONSTRAINT.
	* ira-costs.c (record_reg_classes): Process CT_RELAXED_MEMORY.
	* ira-lives.c (single_reg_class): Use
	insn_extra_relaxed_memory_constraint.
	* ira.c (ira_setup_alts): CT_RELAXED_MEMORY.
	* lra-constraints.c (valid_address_p): Use
	insn_extra_relaxed_memory_constraint instead of other memory
	constraints.
	(process_alt_operands): Process CT_RELAXED_MEMORY.
	(curr_insn_transform): Use insn_extra_relaxed_memory_constraint.
	* recog.c (asm_operand_ok, preprocess_constraints): Process
	CT_RELAXED_MEMORY.
	* reload.c (find_reloads): Ditto.
	* rtl.def (DEFINE_RELAXED_MEMORY_CONSTRAINT): New.
	* stmt.c (parse_input_constraint): Use
	insn_extra_relaxed_memory_constraint.

2021-03-22  Segher Boessenkool  <segher@kernel.crashing.org>

	PR target/97926
	* ubsan.c (ubsan_instrument_float_cast): Don't test for unordered if
	there are no NaNs.

2021-03-22  Alex Coplan  <alex.coplan@arm.com>

	PR target/97252
	* config/arm/arm-protos.h (neon_make_constant): Add generate
	argument to guard emitting insns, default to true.
	* config/arm/arm.c (arm_legitimate_constant_p_1): Reject
	CONST_VECTORs which neon_make_constant can't handle.
	(neon_vdup_constant): Add generate argument, avoid emitting
	insns if it's not set.
	(neon_make_constant): Plumb new generate argument through.
	* config/arm/constraints.md (Ui): New. Use it...
	* config/arm/mve.md (*mve_mov<mode>): ... here.
	* config/arm/vec-common.md (movv8hf): Use neon_make_constant to
	synthesize constants.

2021-03-22  Richard Biener  <rguenther@suse.de>

	* debug.h: Add deprecation warning.

2021-03-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99694
	* tree-ssa-sccvn.c (visit_phi): Ignore edges with the
	PHI result.

2021-03-22  Kito Cheng  <kito.cheng@sifive.com>

	PR target/99702
	* config/riscv/riscv.c (riscv_expand_block_move): Get RTL value
	after type checking.

2021-03-22  Jakub Jelinek  <jakub@redhat.com>

	PR debug/99562
	PR debug/66728
	* dwarf2out.c (get_full_len): Use get_precision rather than
	min_precision.
	(add_const_value_attribute): Make sure add_AT_wide argument has
	precision prec rather than some very wide one.

2021-03-22  Kewen Lin  <linkw@linux.ibm.com>

	* config/rs6000/rs6000.md (*rotldi3_insert_sf,
	*mov<SFDF:mode><SFDF2:mode>cc_p9, floatsi<mode>2_lfiwax,
	floatsi<mode>2_lfiwax_mem, floatunssi<mode>2_lfiwzx,
	floatunssi<mode>2_lfiwzx_mem, *floatsidf2_internal,
	*floatunssidf2_internal, fix_trunc<mode>si2_stfiwx,
	fix_trunc<mode>si2_internal, fixuns_trunc<mode>si2_stfiwx,
	*round32<mode>2_fprs, *roundu32<mode>2_fprs,
	*fix_trunc<mode>si2_internal): Fix empty split condition.
	* config/rs6000/vsx.md (*vsx_le_undo_permute_<mode>,
	vsx_reduc_<VEC_reduc_name>_v2df, vsx_reduc_<VEC_reduc_name>_v4sf,
	*vsx_reduc_<VEC_reduc_name>_v2df_scalar,
	*vsx_reduc_<VEC_reduc_name>_v4sf_scalar): Likewise.

2021-03-22  Xionghu Luo  <luoxhu@linux.ibm.com>

	PR target/98914
	* config/rs6000/rs6000.c (rs6000_expand_vector_set_var_p9):
	Convert idx to DImode.
	(rs6000_expand_vector_set_var_p8): Likewise.

2021-03-21  Jakub Jelinek  <jakub@redhat.com>

	PR debug/99388
	* dwarf2out.c (insert_float): Change return type from void to
	unsigned, handle GET_MODE_SIZE (mode) == 2 and return element size.
	(mem_loc_descriptor, loc_descriptor, add_const_value_attribute):
	Adjust callers.

2021-03-20  H.J. Lu  <hjl.tools@gmail.com>

	PR target/99679
	* config/i386/i386.c (construct_container): Check cfun != NULL
	before accessing silent_p.

2021-03-20  Ahamed Husni  <ahamedhusni73@gmail.com>

	* asan.c: Fix typos in comments.

2021-03-20  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/99680
	* lra-constraints.c (skip_contraint_modifiers): Rename to skip_constraint_modifiers.
	(process_address_1): Check empty constraint before using
	CONSTRAINT_LEN.

2021-03-19  Pat Haugen  <pthaugen@linux.ibm.com>

	* config/rs6000/rs6000.c (power10_cost): New.
	(rs6000_option_override_internal): Set Power10 costs.
	(rs6000_issue_rate): Set Power10 issue rate.
	* config/rs6000/power10.md: Rewrite for Power10.

2021-03-19  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/99663
	* lra-constraints.c (process_address_1): Don't use unknown
	constraint for address constraint.

2021-03-19  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/99661
	* config.gcc (powerpc-*-darwin8): Delete the reference to
	the now removed darwin8.h.

2021-03-19  Olivier Hainque  <hainque@adacore.com>

	PR target/99660
	* config/vxworksae.h (VX_CPU_PREFIX): Define.

2021-03-19  John David Anglin  <danglin@gcc.gnu.org>

	* config/pa/pa.c (import_milli): Use memcpy instead of strncpy.

2021-03-19  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/99656
	* tree-vect-slp-patterns.c (linear_loads_p,
	complex_add_pattern::matches, is_eq_or_top,
	vect_validate_multiplication, complex_mul_pattern::matches,
	complex_fms_pattern::matches): Remove complex_perm_kinds_t.
	* tree-vectorizer.h: (complex_load_perm_t): Removed.
	(slp_tree_to_load_perm_map_t): Use complex_perm_kinds_t instead of
	complex_load_perm_t.

2021-03-19  H.J. Lu  <hjl.tools@gmail.com>

	PR target/99652
	* config/i386/i386-options.c (ix86_init_machine_status): Set
	silent_p to true.
	* config/i386/i386.c (init_cumulative_args): Set silent_p to
	false.
	(construct_container): Return early for return and argument
	errors if silent_p is true.
	* config/i386/i386.h (machine_function): Add silent_p.

2021-03-19  Jakub Jelinek  <jakub@redhat.com>

	PR target/99593
	* config/arm/constraints.md (Ds): New constraint.
	* config/arm/vec-common.md (mve_vshlq_<supf><mode>): Use w,Ds
	constraint instead of w,Dm.

2021-03-19  Andrew Stubbs  <ams@codesourcery.com>

	* config/gcn/gcn.c (gcn_parse_amdgpu_hsa_kernel_attribute): Fix quotes
	in error message.

2021-03-19  Eric Botcazou  <ebotcazou@adacore.com>

	PR middle-end/99641
	* fold-const.c (native_encode_initializer) <CONSTRUCTOR>: For an
	array type, do the computation of the current position in sizetype.

2021-03-18  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/99422
	* lra-constraints.c (process_address_1): Use lookup_constraint
	only for a single constraint.

2021-03-18  Martin Sebor  <msebor@redhat.com>

	PR middle-end/99502
	* gimple-array-bounds.cc (inbounds_vbase_memaccess_p): Rename...
	(inbounds_memaccess_p): ...to this.  Check the ending offset of
	the accessed member.

2021-03-18  Andrew Stubbs  <ams@codesourcery.com>

	* config/gcn/gcn.c (gcn_parse_amdgpu_hsa_kernel_attribute): Add %< and
	  %> quote markers to error messages.
	(gcn_goacc_validate_dims): Likewise.
	(gcn_conditional_register_usage): Remove exclaimation mark from error
	message.
	(gcn_vectorize_vec_perm_const): Ensure perm is fully uninitialized.

2021-03-18  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/x86-tune-costs.h (struct processor_costs): Fix costs of
	integer divides1.

2021-03-18  Sinan Lin  <sinan@isrc.iscas.ac.cn>
	    Kito Cheng  <kito.cheng@sifive.com>

	* config/riscv/riscv.c (riscv_block_move_straight): Change type
	to unsigned HOST_WIDE_INT for parameter and local variable with
	HOST_WIDE_INT type.
	(riscv_adjust_block_mem): Ditto.
	(riscv_block_move_loop): Ditto.
	(riscv_expand_block_move): Ditto.

2021-03-18  Nick Clifton  <nickc@redhat.com>

	* config/v850/v850.c (construct_restore_jr): Increase static
	 buffer size.
	(construct_save_jarl): Likewise.
	* config/v850/v850.h (DWARF2_DEBUGGING_INFO): Define.

2021-03-18  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64.c (aarch64_adjust_generic_arch_tuning): Define.
	(aarch64_override_options_internal): Use it.
	(generic_tunings): Add AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS to
	tune_flags.

2021-03-17  Sandra Loosemore  <sandra@codesourcery.com>

	* config/nios2/nios2.c (nios2_custom_check_insns): Clean up
	error message format issues.
	(nios2_option_override): Likewise.
	(nios2_expand_fpu_builtin): Likewise.
	(nios2_init_custom_builtins): Adjust to avoid bogus strncpy
	truncation warning.
	(nios2_expand_custom_builtin): More error message format fixes.
	(nios2_expand_rdwrctl_builtin): Likewise.
	(nios2_expand_rdprs_builtin): Likewise.
	(nios2_expand_eni_builtin): Likewise.
	(nios2_expand_builtin): Likewise.
	(nios2_register_custom_code): Likewise.
	(nios2_valid_target_attribute_rec): Likewise.
	(nios2_add_insn_asm): Fix uninitialized variable warning.

2021-03-17  Jan Hubicka  <jh@suse.cz>

	* config/i386/x86-tune-costs.h (struct processor_costs): Update costs
	of gather to match reality.
	* config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Enable for znver3.

2021-03-17  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-builtins.c (aarch64_expand_rng_builtin): Use EQ
	to compare against CC_REG rather than NE.

2021-03-17  H.J. Lu  <hjl.tools@gmail.com>

	PR target/99504
	* config/i386/i386.c (ix86_force_load_from_GOT_p): Support
	inline assembly statements.
	(ix86_print_operand): Update 'P' handling for -fno-plt.

2021-03-17  Tamar Christina  <tamar.christina@arm.com>

	PR target/99542
	* config/aarch64/aarch64.c
	(aarch64_simd_clone_compute_vecsize_and_simdlen): Remove unused var.

2021-03-16  Segher Boessenkool  <segher@kernel.crashing.org>

	PR target/98092
	* config/rs6000/predicates.md (branch_comparison_operator): Allow
	ordered and unordered for CCFPmode, if flag_finite_math_only.

2021-03-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/99600
	* config/i386/i386-expand.c (ix86_split_lea_for_addr): Emit a MULT
	rather than ASHIFT.
	* config/i386/i386.md (mult by 1248 into ashift): New splitter.

2021-03-16  Martin Liska  <mliska@suse.cz>

	PR target/99592
	* optc-save-gen.awk: Add flag_ipa_ra to exceptions for
	cl_optimization_compare function.

2021-03-16  Ilya Leoshkevich  <iii@linux.ibm.com>

	* config/s390/s390.c (f_constraint_p): Treat "fv" constraints
	as "v".

2021-03-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/99563
	* config/i386/i386.h (struct machine_function): Add
	has_explicit_vzeroupper bitfield.
	* config/i386/i386-expand.c (ix86_expand_builtin): Set
	cfun->machine->has_explicit_vzeroupper when expanding
	IX86_BUILTIN_VZEROUPPER.
	* config/i386/i386-features.c (rest_of_handle_insert_vzeroupper):
	Do the mode switching only when TARGET_VZEROUPPER, expensive
	optimizations turned on and not optimizing for size.
	(pass_insert_vzeroupper::gate): Enable even when
	cfun->machine->has_explicit_vzeroupper is set.

2021-03-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/99542
	* config/aarch64/aarch64.c
	(aarch64_simd_clone_compute_vecsize_and_simdlen): If not a function
	definition, walk TYPE_ARG_TYPES list if non-NULL for argument types
	instead of DECL_ARGUMENTS.  Ignore types for uniform arguments.

2021-03-15  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98834
	* tree-ssa-sccvn.c (vn_reference_lookup_3): Handle missing
	subsetting by truncating the access size.

2021-03-15  Jan Hubicka  <hubicka@ucw.cz>

	* config/i386/i386-options.c (processor_cost_table): Add znver3_cost.
	* config/i386/x86-tune-costs.h (znver3_cost): New gobal variable; copy
	of znver2_cost.

2021-03-15  Martin Liska  <mliska@suse.cz>

	* spellcheck.c: Add missing comma in initialization.

2021-03-14  Uroš Bizjak  <ubizjak@gmail.com>

	* config/i386/sse.md (*vec_extract<mode>): Merge alternative 0 with
	alternative 2 and alternative 1 with alternative 3 using
	YW register constraint.
	(*vec_extract<PEXTR_MODE12:mode>_zext): Merge alternatives
	using YW register constraint.
	(*vec_extractv16qi_zext): Ditto.
	(*vec_extractv4si): Merge alternatives 4 and 5
	using Yw register constraint.
	(*ssse3_palignr<mode>_perm): Use Yw instead of v for alternative 3.

2021-03-13  Martin Sebor  <msebor@redhat.com>

	PR tree-optimization/99489
	* builtins.c (gimple_call_alloc_size): Fail gracefully when argument
	is not a call statement.

2021-03-13  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/99544
	* match.pd (X + (X << C) -> X * (1 + (1 << C))): Don't simplify
	if for vector types multiplication can't be done in type's mode.

2021-03-12  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/99422
	* config/sparc/constraints.md (w): Rename to...
	(W): ... this and ditch previous implementation.
	* config/sparc/sparc.md (*movdi_insn_sp64): Replace W with m.
	(*movdf_insn_sp64): Likewise.
	(*mov<VM64:mode>_insn_sp64): Likewise.
	* config/sparc/sync.md (*atomic_compare_and_swap<mode>_1): Replace
	w with W.
	(atomic_compare_and_swap_leon3_1): Likewise.
	(*atomic_compare_and_swapdi_v8plus): Likewise.
	* config/sparc/sparc.c (memory_ok_for_ldd): Remove useless test on
	architecture and add missing address validity check during LRA.

2021-03-12  Tobias Burnus  <tobias@codesourcery.com>

	PR fortran/98858
	* gimplify.c (omp_add_variable): Handle NULL_TREE as size
	occuring for assumed-size arrays in use_device_{ptr,addr}.

2021-03-12  Jakub Jelinek  <jakub@redhat.com>

	PR target/99321
	* config/i386/constraints.md (YW): New internal constraint.
	* config/i386/sse.md (v_Yw): Add V4TI, V2TI, V1TI and TI cases.
	(*<sse2_avx2>_<insn><mode>3<mask_name>,
	*<sse2_avx2>_uavg<mode>3<mask_name>, *abs<mode>2,
	*<s>mul<mode>3_highpart<mask_name>): Use <v_Yw> instead of v in
	constraints.
	(<sse2_avx2>_psadbw): Use YW instead of v in constraints.
	(*avx2_pmaddwd, *sse2_pmaddwd, *<code>v8hi3, *<code>v16qi3,
	avx2_pmaddubsw256, ssse3_pmaddubsw128): Merge last two alternatives
	into one, use Yw instead of former x,v.
	(ashr<mode>3, <insn><mode>3): Use <v_Yw> instead of x in constraints of
	the last alternative.
	(<sse2_avx2>_packsswb<mask_name>, <sse2_avx2>_packssdw<mask_name>,
	<sse2_avx2>_packuswb<mask_name>, <sse4_1_avx2>_packusdw<mask_name>,
	*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>, <ssse3_avx2>_palignr<mode>,
	<ssse3_avx2>_pshufb<mode>3<mask_name>): Merge last two alternatives
	into one, use <v_Yw> instead of former x,v.
	(avx2_interleave_highv32qi<mask_name>,
	vec_interleave_highv16qi<mask_name>): Use Yw instead of v in
	constraints.  Add && <mask_avx512bw_condition> to condition.
	(avx2_interleave_lowv32qi<mask_name>,
	vec_interleave_lowv16qi<mask_name>,
	avx2_interleave_highv16hi<mask_name>,
	vec_interleave_highv8hi<mask_name>,
	avx2_interleave_lowv16hi<mask_name>, vec_interleave_lowv8hi<mask_name>,
	avx2_pshuflw_1<mask_name>, sse2_pshuflw_1<mask_name>,
	avx2_pshufhw_1<mask_name>, sse2_pshufhw_1<mask_name>,
	avx2_<code>v16qiv16hi2<mask_name>, sse4_1_<code>v8qiv8hi2<mask_name>,
	*sse4_1_<code>v8qiv8hi2<mask_name>_1, <sse2_avx2>_<insn><mode>3): Use
	Yw instead of v in constraints.
	* config/i386/mmx.md (Yv_Yw): New define_mode_attr.
	(*mmx_<insn><mode>3, mmx_ashr<mode>3, mmx_<insn><mode>3): Use <Yv_Yw>
	instead of Yv in constraints.
	(*mmx_<insn><mode>3, *mmx_mulv4hi3, *mmx_smulv4hi3_highpart,
	*mmx_umulv4hi3_highpart, *mmx_pmaddwd, *mmx_<code>v4hi3,
	*mmx_<code>v8qi3, mmx_pack<s_trunsuffix>swb, mmx_packssdw,
	mmx_punpckhbw, mmx_punpcklbw, mmx_punpckhwd, mmx_punpcklwd,
	*mmx_uavgv8qi3, *mmx_uavgv4hi3, mmx_psadbw): Use Yw instead of Yv in
	constraints.
	(*mmx_pinsrw, *mmx_pinsrb, *mmx_pextrw, *mmx_pextrw_zext, *mmx_pextrb,
	*mmx_pextrb_zext): Use YW instead of Yv in constraints.
	(*mmx_eq<mode>3, mmx_gt<mode>3): Use x instead of Yv in constraints.
	(mmx_andnot<mode>3, *mmx_<code><mode>3): Split last alternative into
	two, one with just x, another isa avx512vl with v.

2021-03-12  Martin Liska  <mliska@suse.cz>

	* doc/invoke.texi: Add missing param documentation.

2021-03-11  David Malcolm  <dmalcolm@redhat.com>

	PR analyzer/96374
	* Makefile.in (ANALYZER_OBJS): Add analyzer/feasible-graph.o and
	analyzer/trimmed-graph.o.
	* doc/analyzer.texi (Analyzer Paths): Rewrite description of
	feasibility checking to reflect new implementation.
	* doc/invoke.texi (-fdump-analyzer-feasibility): Document new
	option.
	* shortest-paths.h (shortest_paths::get_shortest_distance): New.

2021-03-11  David Malcolm  <dmalcolm@redhat.com>

	* digraph.cc (selftest::test_shortest_paths): Update
	shortest_paths init for new param.  Add test of
	SPS_TO_GIVEN_TARGET.
	* shortest-paths.h (enum shortest_path_sense): New.
	(shortest_paths::shortest_paths): Add "sense" param.
	Update for renamings.  Generalize to use "sense" param.
	(shortest_paths::get_shortest_path): Rename param.
	(shortest_paths::m_sense): New field.
	(shortest_paths::m_prev): Rename...
	(shortest_paths::m_best_edge): ...to this.
	(shortest_paths::get_shortest_path): Update for renamings.
	Conditionalize flipping of path on sense of traversal.

2021-03-11  David Malcolm  <dmalcolm@redhat.com>

	* digraph.cc (selftest::test_shortest_paths): Add test coverage
	for paths from B and C.
	* shortest-paths.h (shortest_paths::shortest_paths): Handle
	unreachable nodes, rather than asserting.

2021-03-11  David Edelsohn  <dje.gcc@gmail.com>

	PR target/99094
	* config/rs6000/rs6000.c (rs6000_xcoff_file_start): Don't create
	xcoff_tbss_section_name.
	* config/rs6000/xcoff.h (ASM_OUTPUT_TLS_COMMON): Use .lcomm.
	* xcoffout.c (xcoff_tbss_section_name): Delete.
	* xcoffout.h (xcoff_tbss_section_name): Delete.

2021-03-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99523
	* tree-cfg.c (dump_function_to_file): Dump SSA names
	w/o identifier to the decls section as well, not only those
	without a VAR_DECL.

2021-03-11  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/99517
	* ipa-icf-gimple.c (func_checker::compare_gimple_call): For internal
	function calls with lhs fail if the lhs don't have compatible types.

2021-03-11  Hans-Peter Nilsson  <hp@axis.com>

	* config/cris/cris.h (HARD_FRAME_POINTER_REGNUM): Define.
	Change FRAME_POINTER_REGNUM to correspond to a new faked
	register faked_fp, part of GENNONACR_REGS like faked_ap.
	(CRIS_FAKED_REGS_CONTENTS): New helper macro.
	(FIRST_PSEUDO_REGISTER, FIXED_REGISTERS, CALL_USED_REGISTERS):
	(REG_ALLOC_ORDER, REG_CLASS_CONTENTS, REGNO_OK_FOR_BASE_P)
	(ELIMINABLE_REGS, REGISTER_NAMES): Adjust accordingly.
	* config/cris/cris.md (CRIS_FP_REGNUM): Renumber to new faked
	register.
	(CRIS_REAL_FP_REGNUM): New constant.
	* config/cris/cris.c (cris_reg_saved_in_regsave_area): Check
	for HARD_FRAME_POINTER_REGNUM instead of FRAME_POINTER_REGNUM.
	(cris_initial_elimination_offset): Handle elimination changes
	to HARD_FRAME_POINTER_REGNUM instead of FRAME_POINTER_REGNUM
	and add one from FRAME_POINTER_REGNUM to
	HARD_FRAME_POINTER_REGNUM.
	(cris_expand_prologue, cris_expand_epilogue): Emit code for
	hard_frame_pointer_rtx instead of frame_pointer_rtx.

2021-03-10  David Edelsohn  <dje.gcc@gmail.com>

	PR target/99492
	* config/rs6000/aix.h (ADJUST_FIELD_ALIGN): Add check for DCmode.
	* config/rs6000/rs6000.c (rs6000_special_round_type_align): Same.

2021-03-10  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/99422
	* lra-constraints.c (process_address_1): Don't check unknown
	constraint, use X for empty constraint.

2021-03-10  Alex Coplan  <alex.coplan@arm.com>

	* config/aarch64/aarch64.c (aarch64_vfp_is_call_or_return_candidate):
	Fix typo in comment describing "is_ha" argument.

2021-03-10  John David Anglin  <danglin@gcc.gnu.org>

	* doc/sourcebuild.texi: Document LRA target selector.

2021-03-10  David Malcolm  <dmalcolm@redhat.com>

	* doc/ux.texi: Add subsection contrasting interactive versus
	batch usage of GCC.

2021-03-10  Joel Hutton  <joel.hutton@arm.com>

	PR target/99102
	* tree-vect-stmts.c (vectorizable_store): Fix scatter store mask
	check condition.
	(vectorizable_load): Fix gather load mask check condition.

2021-03-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99510
	* tree.c (check_aligned_type): Check that the candidate
	has TYPE_USER_ALIGN set instead of matching with the
	original type.

2021-03-10  Eric Botcazou  <ebotcazou@adacore.com>

	* config/sparc/sparc.c (sparc_regmode_natural_size): Return 4 for
	float and vector integer modes only if the mode is not larger.

2021-03-10  Hans-Peter Nilsson  <hp@axis.com>

	* config/cris/cris.h (DWARF_FRAME_REGISTERS): Define.

2021-03-09  Vladimir N. Makarov  <vmakarov@redhat.com>

	* ira.c (ira_setup_alts, ira_get_dup_out_num): Process digital
	constraints > 9.
	* ira-lives.c (single_reg_class): Ditto.

2021-03-09  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config.gcc (aarch64-*-rtems*): Include general rtems.h after
	the architecture-specific rtems.h.
	(aarch64-*-rtems*): Likewise.
	(arm*-*-rtems*): Likewise.
	(epiphany-*-rtems*): Likewise.
	(riscv*-*-rtems*): Likewise.

2021-03-09  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/99305
	* tree-ssa-phiopt.c (conditional_replacement): Test integer_pow2p
	before integer_all_onesp instead of vice versa.

2021-03-09  Richard Earnshaw  <rearnsha@arm.com>

	* common/config/arm/arm-common.c (arm_config_default): Change type
	of 'i' to unsigned.

2021-03-09  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/99454
	* lra-constraints.c (process_address_1): Process constraint 'g'
	separately and digital constraints containing more one digit.

2021-03-09  Nick Clifton  <nickc@redhat.com>

	* config/rx/rx.h (DBX_DEBUGGING_INFO): Define.
	(DWARF"_DEBUGGING_INFO): Define.

2021-03-09  Eric Botcazou  <ebotcazou@adacore.com>

	PR c++/90448
	* calls.c (initialize_argument_information): When the argument
	is passed by reference, do not make a copy in a thunk only if
	the argument is already in memory.  Remove redundant test for
	the case of callee copy.

2021-03-09  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/99454
	* lra-constraints.c (process_address_1): Process 0..9 constraints
	in process_address_1.

2021-03-09  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/s390.c (struct s390_processor processor_table):
	Binutils name string must not be empty.

2021-03-09  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.c (arc_attr_type): Remove function.

2021-03-09  Martin Liska  <mliska@suse.cz>

	PR target/99464
	* config/i386/i386-options.c (ix86_option_override_internal):
	Set isa_flags for OPTS argument and not for the global
	global_options.

2021-03-09  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config/rs6000/predicates.md (ds_form_mem_operand): Check
	in correct code.

2021-03-09  Aaron Sawdey  <acsawdey@linux.ibm.com>

	PR target/99070
	* config/rs6000/predicates.md (ds_form_mem_operand) New
	predicate.
	* config/rs6000/genfusion.pl (gen_ld_cmpi_p10) Use
	ds_form_mem_operand in ld/lwa patterns.
	* config/rs6000/fusion.md: Regenerate file.

2021-03-08  Martin Sebor  <msebor@redhat.com>

	PR middle-end/98266
	* gimple-array-bounds.cc (inbounds_vbase_memaccess_p): New function.
	(array_bounds_checker::check_array_bounds): Call it.

2021-03-08  Martin Sebor  <msebor@redhat.com>

	PR middle-end/97631
	* tree-ssa-strlen.c (maybe_warn_overflow): Test rawmem.
	(handle_builtin_stxncpy_strncat): Rename locals.  Determine
	destination size from allocation calls.  Issue a more appropriate
	kind of warning.
	(handle_builtin_memcpy): Pass true as rawmem to maybe_warn_overflow.
	(handle_builtin_memset): Same.

2021-03-08  Peter Bergner  <bergner@linux.ibm.com>

	PR target/98959
	* config/rs6000/rs6000.c (rs6000_emit_le_vsx_permute): Add an assert
	to ensure we do not have an Altivec style address.
	* config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): Disable if passed
	an Altivec style address.
	(*vsx_le_perm_store_<mode>): Likewise.
	(splitters after *vsx_le_perm_store_<mode>): Likewise.
	(vsx_load_<mode>): Disable special expander if passed an Altivec
	style address.
	(vsx_store_<mode>): Likewise.

2021-03-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	PR target/99437
	* config/aarch64/predicates.md (aarch64_simd_shift_imm_vec_qi): Define.
	(aarch64_simd_shift_imm_vec_hi): Likewise.
	(aarch64_simd_shift_imm_vec_si): Likewise.
	(aarch64_simd_shift_imm_vec_di): Likewise.
	* config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Use
	predicate from above.
	(aarch64_shrn<mode>_insn_be): Likewise.
	(aarch64_rshrn<mode>_insn_le): Likewise.
	(aarch64_rshrn<mode>_insn_be): Likewise.
	(aarch64_shrn2<mode>_insn_le): Likewise.
	(aarch64_shrn2<mode>_insn_be): Likewise.
	(aarch64_rshrn2<mode>_insn_le): Likewise.
	(aarch64_rshrn2<mode>_insn_be): Likewise.

2021-03-08  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/99422
	* lra-constraints.c (skip_contraint_modifiers): New function.
	(process_address_1): Use it before lookup_constraint call.

2021-03-08  Martin Liska  <mliska@suse.cz>

	PR target/99463
	* config/i386/i386-options.c (ix86_option_override_internal):
	Enable UINTR and HRESET for -march that supports it.

2021-03-08  Ilya Leoshkevich  <iii@linux.ibm.com>

	* config/s390/s390.c (f_constraint_p): New function.
	(s390_md_asm_adjust): Implement TARGET_MD_ASM_ADJUST.
	(TARGET_MD_ASM_ADJUST): Likewise.

2021-03-08  Tobias Burnus  <tobias@codesourcery.com>

	PR fortran/97927
	* tree-nested.c (convert_local_reference_stmt): Avoid calling
	lookup_field_for_decl for Fortran module (= namespace context).

2021-03-08  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/s390.c (s390_expand_vec_compare): Implement <0
	comparison with arithmetic right shift.
	(s390_expand_vcond): No need for a force_reg anymore.
	s390_vec_compare will do it.
	* config/s390/vector.md ("vec_cmp<mode><tointvec>"): Accept also
	immediate operands.

2021-03-07  Jakub Jelinek  <jakub@redhat.com>

	PR target/99321
	* config/i386/constraints.md (Yw): Use SSE_REGS if TARGET_SSE
	but TARGET_AVX512BW or TARGET_AVX512VL is not set.  Adjust description
	and comment.
	* config/i386/sse.md (v_Yw): New define_mode_attr.
	(*<insn><mode>3, *mul<mode>3<mask_name>, *avx2_<code><mode>3,
	*sse4_1_<code><mode>3<mask_name>): Use <v_Yw> instead of v
	in constraints.
	* config/i386/mmx.md (mmx_pshufw_1, *vec_dupv4hi): Use Yw instead of
	xYw in constraints.

2021-03-06  Julian Brown  <julian@codesourcery.com>

	* tree-pretty-print.c (dump_generic_node): Emit non-generic
	address space info for aggregates.

2021-03-06  Hans-Peter Nilsson  <hp@axis.com>

	* config/cris/cris.h (MAX_FIXED_MODE_SIZE): Don't define.

2021-03-05  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/99322
	* tree-cfg.c (bb_to_omp_idx): New variable.
	(execute_build_cfg): Release the bb_to_omp_idx vector after
	cleanup_tree_cfg returns.
	(handle_abnormal_edges): Remove bb_to_omp_idx argument, adjust
	for bb_to_omp_idx being a vec<int> instead of pointer to array
	of ints.
	(make_edges): Remove bb_to_omp_idx local variable, don't pass
	it to handle_abnormal_edges, adjust for bb_to_omp_idx being a
	vec<int> instead of pointer to array of ints and don't free/release
	it at the end.
	(remove_bb): When removing a bb and placing forced label somewhere
	else, ensure it is put into the same OpenMP region during cfg
	pass if possible or to entry successor as fallback.  Unregister
	bb from bb_to_omp_idx.

2021-03-05  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/99378
	* lra-constraints.c (process_address_1): Skip decomposing address
	for asm insn operand with unknown constraint.

2021-03-05  Martin Jambor  <mjambor@suse.cz>

	PR ipa/98078
	* cgraph.c (cgraph_edge::set_call_stmt): Do not update all
	corresponding speculative edges if we are about to resolve
	sepculation.  Make edge direct (and so resolve speculations) before
	removing it from call_site_hash.
	(cgraph_edge::make_direct): Relax the initial assert to allow calling
	the function on speculative direct edges.

2021-03-05  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/99376
	* rtlanal.c (nonzero_bits1) <arithmetic operators>: If the number
	of low-order zero bits is too large, set the result to 0 directly.

2021-03-04  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/93235
	* expmed.c (store_bit_field_using_insv): Return false of xop0 is a
	SUBREG and a SUBREG to op_mode can't be created.

2021-03-04  Alex Coplan  <alex.coplan@arm.com>

	PR target/99381
	* config/aarch64/aarch64-sve-builtins.cc
	(function_resolver::require_vector_type): Handle error_mark_node.

2021-03-04  Ilya Leoshkevich  <iii@linux.ibm.com>

	* cfgexpand.c (expand_asm_loc): Pass new parameter.
	(expand_asm_stmt): Likewise.
	* config/arm/aarch-common-protos.h (arm_md_asm_adjust): Add new
	parameter.
	* config/arm/aarch-common.c (arm_md_asm_adjust): Likewise.
	* config/arm/arm.c (thumb1_md_asm_adjust): Likewise.
	* config/cris/cris.c (cris_md_asm_adjust): Likewise.
	* config/i386/i386.c (ix86_md_asm_adjust): Likewise.
	* config/mn10300/mn10300.c (mn10300_md_asm_adjust): Likewise.
	* config/nds32/nds32.c (nds32_md_asm_adjust): Likewise.
	* config/pdp11/pdp11.c (pdp11_md_asm_adjust): Likewise.
	* config/rs6000/rs6000.c (rs6000_md_asm_adjust): Likewise.
	* config/vax/vax.c (vax_md_asm_adjust): Likewise.
	* config/visium/visium.c (visium_md_asm_adjust): Likewise.
	* doc/tm.texi (md_asm_adjust): Likewise.
	* target.def (md_asm_adjust): Likewise.

2021-03-04  Richard Biener  <rguenther@suse.de>

	PR middle-end/97855
	* tree-pretty-print.c: Poison pp_printf.
	(dump_decl_name): Avoid use of pp_printf.
	(dump_block_node): Likewise.
	(dump_generic_node): Likewise.

2021-03-04  Martin Sebor  <msebor@redhat.com>

	PR middle-end/96963
	PR middle-end/94655
	* builtins.c (handle_array_ref): New helper.
	(handle_mem_ref): New helper.
	(compute_objsize_r): Factor out ARRAY_REF and MEM_REF handling
	into new helper functions.  Correct a workaround for vectorized
	assignments.

2021-03-03  Pat Haugen  <pthaugen@linux.ibm.com>

	* config/rs6000/dfp.md (extendddtd2, trunctddd2, *cmp<mode>_internal1,
	floatditd2, ftrunc<mode>2, fix<mode>di2, dfp_ddedpd_<mode>,
	dfp_denbcd_<mode>, dfp_dxex_<mode>, dfp_diex_<mode>,
	*dfp_sgnfcnc_<mode>, dfp_dscli_<mode>, dfp_dscri_<mode>): Update size
	attribute for Power10.
	* config/rs6000/mma.md (*movoo): Likewise.
	* config/rs6000/rs6000.md (define_attr "size"): Add 256.
	(define_mode_attr bits): Add DD/TD modes.
	* config/rs6000/sync.md (load_quadpti, store_quadpti, load_lockedpti,
	store_conditionalpti): Update size attribute for Power10.

2021-03-03  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR bootstrap/92002
	* config/sparc/t-sparc (tree-ssanames.o-warn): Don't error for
	-Wuninitialized, -Wmaybe-uninitialized.
	(wide-int.o-warn): Likewise.

2021-03-03  Richard Earnshaw  <rearnsha@arm.com>

	* common/config/arm/arm-common.c: Include configargs.h.
	(arm_config_default): New function.
	(arm_target_mode): Renamed from arm_target_thumb_only.  Handle
	processors that do not support Thumb.  Take into account the
	--with-mode configuration setting for selecting the default.
	* config/arm/arm.h (OPTION_DEFAULT_SPECS): Remove entry for 'mode'.
	(TARGET_MODE_SPEC_FUNCTIONS): Update for function name change.

2021-03-03  Martin Liska  <mliska@suse.cz>

	PR gcov-profile/97461
	* gcov-io.h (GCOV_PREALLOCATED_KVP): Remove.

2021-03-03  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/99234
	* config/i386/i386.c (ix86_compute_frame_layout): For a SEH target,
	point back the hard frame pointer to its default location when the
	frame is larger than SEH_MAX_FRAME_SIZE.

2021-03-03  Jakub Jelinek  <jakub@redhat.com>

	PR target/99321
	* config/i386/predicates.md (logic_operator): New define_predicate.
	* config/i386/i386.md (mov + mem using comm arith peephole2):
	Punt if operands[1] is EXT_REX_SSE_REGNO_P, AVX512BW is not enabled
	and the inner mode is [QH]Imode.

2021-03-03  Jakub Jelinek  <jakub@redhat.com>

	PR debug/99090
	* dwarf2out.c (dw_loc_list_struct): Add end_entry member.
	(new_loc_list): Clear end_entry.
	(output_loc_list): Only use DW_LLE_startx_length for -gsplit-dwarf
	if HAVE_AS_LEB128, otherwise use DW_LLE_startx_endx.  Fix comment
	typo.
	(index_location_lists): For dwarf_version >= 5 without HAVE_AS_LEB128,
	initialize also end_entry.

2021-03-03  Jakub Jelinek  <jakub@redhat.com>

	PR target/99085
	* cfgrtl.c (fixup_partitions): When changing some bbs from hot to cold
	partitions, if in non-layout mode after reorder_blocks also move
	affected blocks to ensure a single partition transition.

2021-03-03  Jason Merrill  <jason@redhat.com>

	PR c++/96078
	* cgraphunit.c (process_function_and_variable_attributes): Don't
	warn about flatten on an alias if the target also has it.
	* cgraph.h (symtab_node::get_alias_target_tree): New.

2021-03-02  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/rs6000.md (tls_get_tpointer_internal): Prepend
	period to symbol name.
	(tls_get_addr_internal<mode>): Same.

2021-03-02  David Malcolm  <dmalcolm@redhat.com>

	PR c/99323
	* diagnostic-show-locus.c
	(selftest::test_one_liner_many_fixits_2): Fix accidental usage of
	column 0.

2021-03-02  Martin Sebor  <msebor@redhat.com>

	PR middle-end/99276
	* builtins.c (warn_for_access): Remove stray warning text.

2021-03-02  Martin Sebor  <msebor@redhat.com>

	PR middle-end/99295
	* doc/extend.texi (attribute malloc): Reword and clarify nonaliasing
	property.

2021-03-02  Jakub Jelinek  <jakub@redhat.com>

	PR debug/99319
	* dwarf2out.c (output_macinfo_op): Use DW_MACRO_*_str* even with
	-gdwarf-5 -gstrict-dwarf.  For -gsplit-dwarf -gdwarf-5 use
	DW_MACRO_*_strx instead of DW_MACRO_*_strp.  Handle
	DW_MACRO_define_strx and DW_MACRO_undef_strx.
	(save_macinfo_strings): Use DW_MACRO_*_str* even with
	-gdwarf-5 -gstrict-dwarf.  Handle DW_MACRO_define_strx and
	DW_MACRO_undef_strx.

2021-03-02  Andreas Krebbel  <krebbel@linux.ibm.com>

	* config/s390/s390-builtin-types.def (BT_FN_V4SF_V8HI_UINT): New
	builtin signature.
	(BT_FN_V8HI_V8HI_UINT): Likewise.
	(BT_FN_V8HI_V4SF_V4SF_UINT): Likewise.
	* config/s390/s390-builtins.def (B_NNPA): New macro definition.
	(s390_vclfnhs, s390_vclfnls, s390_vcrnfs, s390_vcfn, s390_vcnf):
	New builtin definitions.
	* config/s390/s390-c.c (s390_cpu_cpp_builtins_internal): Bump
	vector extension version.
	* config/s390/s390.c (s390_expand_builtin): Check if builtins are
	available with current -march level.
	* config/s390/s390.md (UNSPEC_NNPA_VCLFNHS_V8HI)
	(UNSPEC_NNPA_VCLFNLS_V8HI, UNSPEC_NNPA_VCRNFS_V8HI)
	(UNSPEC_NNPA_VCFN_V8HI, UNSPEC_NNPA_VCNF_V8HI): New constants.
	* config/s390/vecintrin.h (vec_extend_to_fp32_hi): New macro.
	(vec_extend_to_fp32_lo): Likewise.
	(vec_round_from_fp32): Likewise.
	(vec_convert_to_fp16): Likewise.
	(vec_convert_from_fp16): Likewise.
	* config/s390/vx-builtins.md (vclfnhs_v8hi): New insn pattern.
	(vclfnls_v8hi): Likewise.
	(vcrnfs_v8hi): Likewise.
	(vcfn_v8hi): Likewise.
	(vcnf_v8hi): Likewise.

2021-03-02  Andreas Krebbel  <krebbel@linux.ibm.com>

	* common/config/s390/s390-common.c (processor_flags_table): New entry.
	* config.gcc: Enable arch14 for --with-arch and --with-tune.
	* config/s390/driver-native.c (s390_host_detect_local_cpu): Pick
	arch14 for unknown CPU models.
	* config/s390/s390-opts.h (enum processor_type): Add PROCESSOR_ARCH14.
	* config/s390/s390.c (s390_issue_rate): Add case for PROCESSOR_ARCH14.
	(s390_get_sched_attrmask): Likewise.
	(s390_get_unit_mask): Likewise.
	* config/s390/s390.h (enum processor_flags): Add PF_NNPA and PF_ARCH14.
	(TARGET_CPU_ARCH14, TARGET_CPU_ARCH14_P, TARGET_CPU_NNPA)
	(TARGET_CPU_NNPA_P, TARGET_ARCH14, TARGET_ARCH14_P, TARGET_NNPA)
	(TARGET_NNPA_P): New macro definitions.
	* config/s390/s390.md ("cpu_facility", "enabled"): Add arch14 and nnpa.
	* config/s390/s390.opt: Add PROCESSOR_ARCH14.

2021-03-02  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/95757
	* tree-vrp.c (register_edge_assert_for): Remove superfluous ()s around
	condition.  Call register_edge_assert_for_1 for == 0, != 0, == 1 and
	!= 1 comparisons if name is lhs of a comparison.

2021-03-01  Iain Sandoe  <iain@sandoe.co.uk>

	PR target/44107
	PR target/48097
	* config/darwin-protos.h (darwin_should_restore_cfa_state): New.
	* config/darwin.c (darwin_should_restore_cfa_state): New.
	* config/darwin.h (TARGET_ASM_SHOULD_RESTORE_CFA_STATE): New.
	* doc/tm.texi: Regenerated.
	* doc/tm.texi.in: Document TARGET_ASM_SHOULD_RESTORE_CFA_STATE.
	* dwarf2cfi.c (connect_traces): If the target requests, restore
	the CFA expression after a DW_CFA_restore.
	* target.def (TARGET_ASM_SHOULD_RESTORE_CFA_STATE): New hook.

2021-03-01  Martin Liska  <mliska@suse.cz>

	PR target/99313
	* optc-save-gen.awk: Add 4 more exceptions.

2021-03-01  Nathan Sidwell  <nathan@acm.org>

	PR c++/99294
	* tree.h (TYPE_ALIGN_RAW): New accessor.
	(TYPE_ALIGN): Use it.

2021-03-01  Jan Hubicka  <jh@suse.cz>

	PR ipa/98338
	* ipa-fnsummary.c (compute_fn_summary): Fix sanity check.

2021-03-01  Eric Botcazou  <ebotcazou@adacore.com>

	PR target/99234
	* config/i386/i386.c (ix86_compute_frame_layout): For a SEH target,
	point the hard frame pointer to the SSE register save area instead
	of the general register save area.  Perform only minimal adjustment
	for small frames if it is initially not correctly aligned.
	(ix86_expand_prologue): Remove early saves for a SEH target.
	* config/i386/winnt.c (struct seh_frame_state): Document constraint.

2021-02-28  Jakub Jelinek  <jakub@redhat.com>

	PR c/99304
	* ipa.c (symbol_table::remove_unreachable_nodes): Fix a comment
	typo - referneced -> referenced.
	* tree.c (component_ref_size): Fix comment typo -
	refernce -> reference.
	* tree-ssa-alias.c (access_path_may_continue_p): Fix comment typo -
	traling -> trailing.
	(aliasing_component_refs_p): Fix comment typos -
	refernce -> reference and refernece -> reference and
	traling -> trailing.
	(nonoverlapping_refs_since_match_p): Fix comment typo -
	referneces -> references.
	* doc/invoke.texi (--param modref-max-bases): Fix a typo -
	referneces -> references.

2021-02-27  Iain Sandoe  <iain@sandoe.co.uk>

	* config/host-darwin.c (darwin_gt_pch_use_address): Modify
	diagnostic message to avoid use of a contraction and format
	warning.

2021-02-27  Jakub Jelinek  <jakub@redhat.com>

	PR other/99288
	* gcse.c (gcse_or_cprop_is_too_expensive): Use %wu instead of
	HOST_WIDE_INT_PRINT_UNSIGNED in warning format string.
	* ipa-devirt.c (ipa_odr_read_section): Use %wd instead of
	HOST_WIDE_INT_PRINT_DEC in inform format string.  Fix comment
	typos.

2021-02-26  Richard Biener  <rguenther@suse.de>

	PR middle-end/99281
	* expr.c (store_field): For calls with return-slot optimization
	and addressable return type expand the store directly.

2021-02-26  Richard Biener  <rguenther@suse.de>

	PR c/99275
	* builtins.c (warn_string_no_nul): Fix diagnostic formatting.

2021-02-26  Peter Bergner  <bergner@linux.ibm.com>

	PR target/99279
	* config/rs6000/rs6000-call.c (rs6000_init_builtins): Replace assert
	with an "if" test.

2021-02-26  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config.gcc: Add rs6000-pcrel-opt.o.
	* config/rs6000/rs6000-pcrel-opt.c: New file.
	* config/rs6000/pcrel-opt.md: New file.
	* config/rs6000/predicates.md: Add d_form_memory predicate.
	* config/rs6000/rs6000-cpus.def: Add OPTION_MASK_PCREL_OPT.
	* config/rs6000/rs6000-passes.def: Add pass_pcrel_opt.
	* config/rs6000/rs6000-protos.h: Add reg_to_non_prefixed(),
	pcrel_opt_valid_mem_p(), output_pcrel_opt_reloc(),
	and make_pass_pcrel_opt().
	* config/rs6000/rs6000.c (reg_to_non_prefixed): Make global.
	(rs6000_option_override_internal): Add pcrel-opt.
	(rs6000_delegitimize_address): Support pcrel-opt.
	(rs6000_opt_masks): Add pcrel-opt.
	(pcrel_opt_valid_mem_p): New function.
	(reg_to_non_prefixed): Make global.
	(rs6000_asm_output_opcode): Reset prepend_p_to_next_insn.
	(output_pcrel_opt_reloc): New function.
	* config/rs6000/rs6000.md (loads_extern_addr): New attr.
	(pcrel_extern_addr): Set loads_extern_addr.
	Add include for pcrel-opt.md.
	* config/rs6000/rs6000.opt: Add -mpcrel-opt.
	* config/rs6000/t-rs6000: Add rules for pcrel-opt.c and
	pcrel-opt.md.

2021-02-26  YunQiang Su  <yunqiang.su@cipunited.com>

	PR target/98996
	* config/mips/mips.c (mips_expand_ext_as_unaligned_load):
	If TARGET_64BIT and dest is SUBREG, we check the width, if it
	equal to SImode, we use SImode operation, just like what we are
	doing for REG one.

2021-02-26  Marek Polacek  <polacek@redhat.com>

	* builtins.c (warn_for_access): Fix typos.

2021-02-25  Iain Sandoe  <iain@sandoe.co.uk>

	* config/aarch64/aarch64.md (<optab>_rol<mode>3): Add a '#'
	mark in front of the immediate quantity.
	(<optab>_rolsi3_uxtw): Likewise.

2021-02-25  Richard Earnshaw  <rearnsha@arm.com>

	PR target/99271
	* config/arm/thumb2.md (nonsecure_call_reg_thumb2_fpcxt): New pattern.
	(nonsecure_call_value_reg_thumb2_fpcxt): Likewise.
	(nonsecure_call_reg_thumb2): Restrict to using r4 for the callee
	address and disable when the FPCXT is not available.
	(nonsecure_call_value_reg_thumb2): Likewise.

2021-02-25  Nathan Sidwell  <nathan@acm.org>

	PR c++/99166
	* doc/invoke.texi (flang-info-module-cmi): Renamed option.

2021-02-25  Tamar Christina  <tamar.christina@arm.com>

	* tree-vect-slp.c (optimize_load_redistribution_1): Abort on NULL nodes.

2021-02-25  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99253
	* tree-vect-loop.c (check_reduction_path): First compute
	code, then verify out-of-loop uses.

2021-02-25  Jakub Jelinek  <jakub@redhat.com>

	PR target/95798
	* match.pd ((T)(A) + CST -> (T)(A + CST)): Add :s to convert.

2021-02-25  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/80635
	* tree-vrp.c (vrp_simplify_cond_using_ranges): Also handle
	VIEW_CONVERT_EXPR if modes are the same, innerop is integral and
	has mode precision.

2021-02-25  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.c (optimize_load_redistribution_1): Delay
	load_map population.
	(vect_match_slp_patterns_2): Revert part of last change.
	(vect_analyze_slp): Do not interleave optimize_load_redistribution
	with pattern detection but do it afterwards.  Dump the
	whole SLP graph after pattern recognition and load
	redistribution optimization finished.

2021-02-24  Jakub Jelinek  <jakub@redhat.com>

	PR fortran/99226
	* omp-low.c (struct omp_context): Add teams_nested_p and
	nonteams_nested_p members.
	(scan_omp_target): Diagnose teams nested inside of target with other
	directives strictly nested inside of the same target.
	(check_omp_nesting_restrictions): Set ctx->teams_nested_p or
	ctx->nonteams_nested_p as needed.

2021-02-24  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR inline-asm/99123
	* lra-constraints.c (uses_hard_regs_p): Don't use decompose_mem_address.

2021-02-24  Hans-Peter Nilsson  <hp@axis.com>

	* config/cris/cris.c (cris_expand_prologue): Set
	current_function_static_stack_size, if flag_stack_usage_info.

2021-02-24  Pat Haugen  <pthaugen@linux.ibm.com>

	* config/rs6000/rs6000.c (next_insn_prefixed_p): Rename.
	(rs6000_final_prescan_insn): Adjust.
	(rs6000_asm_output_opcode): Likewise.

2021-02-24  Martin Sebor  <msebor@redhat.com>

	PR middle-end/97172
	* attribs.c (attr_access::free_lang_data): Clear attribute arg spec
	from function arguments.

2021-02-24  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/99220
	* tree-vect-slp.c (optimize_load_redistribution_1): Remove
	node from cache when it's about to be deleted.

2021-02-24  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/99225
	* fold-const.c (fold_binary_loc) <case NE_EXPR>: In (x & (1 << y)) != 0
	to ((x >> y) & 1) != 0 simplifications use build_one_cst instead of
	build_int_cst (..., 1).  Formatting fixes.

2021-02-24  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/99149
	* tree-vect-slp-patterns.c (vect_detect_pair_op): Don't recreate the
	buffer.
	(vect_slp_reset_pattern): Remove.
	(complex_fma_pattern::matches): Remove call to vect_slp_reset_pattern.
	(complex_mul_pattern::build, complex_fma_pattern::build,
	complex_fms_pattern::build): Fix ref counts.
	* tree-vect-slp.c (vect_free_slp_tree): Undo SLP only pattern relevancy
	when node is being deleted.
	(vect_match_slp_patterns_2): Correct result of cache hit on patterns.
	(vect_schedule_slp): Invalidate SLP_TREE_REPRESENTATIVE of removed
	stores.
	* tree-vectorizer.c (vec_info::new_stmt_vec_info): Initialize value.

2021-02-24  Matthias Klose  <doko@ubuntu.com>

	Revert:
	2020-12-07  Matthias Klose  <doko@ubuntu.com>

	* genextract.c (print_header): Undefine ENABLE_RTL_CHECKING
	and ENABLE_RTL_FLAG_CHECKING.

2021-02-24  Richard Biener  <rguenther@suse.de>

	PR c/99224
	* builtins.c (fold_builtin_next_arg): Avoid NULL arg.

2021-02-23  Peter Bergner  <bergner@linux.ibm.com>

	* config/rs6000/mma.md (mma_assemble_pair): Rename from this...
	(vsx_assemble_pair): ...to this.
	(*mma_assemble_pair): Rename from this...
	(*vsx_assemble_pair): ...to this.
	(mma_disassemble_pair): Rename from this...
	(vsx_disassemble_pair): ...to this.
	(*mma_disassemble_pair): Rename from this...
	(*vsx_disassemble_pair): ...to this.
	* config/rs6000/rs6000-builtin.def (BU_MMA_V2, BU_MMA_V3,
	BU_COMPAT): New macros.
	(mma_assemble_pair): Rename from this...
	(vsx_assemble_pair): ...to this.
	(mma_disassemble_pair): Rename from this...
	(vsx_disassemble_pair): ...to this.
	(mma_assemble_pair): New compatibility built-in.
	(mma_disassemble_pair): Likewise.
	* config/rs6000/rs6000-call.c (struct builtin_compatibility): New.
	(RS6000_BUILTIN_COMPAT): Define.
	(bdesc_compat): New.
	(mma_expand_builtin): Use VSX_BUILTIN_DISASSEMBLE_PAIR_INTERNAL.
	(rs6000_gimple_fold_mma_builtin): Use MMA_BUILTIN_DISASSEMBLE_PAIR
	and VSX_BUILTIN_ASSEMBLE_PAIR.
	(rs6000_init_builtins): Register compatibility built-ins.
	(mma_init_builtins): Use VSX_BUILTIN_ASSEMBLE_PAIR,
	VSX_BUILTIN_ASSEMBLE_PAIR_INTERNAL, VSX_BUILTIN_DISASSEMBLE_PAIR and
	VSX_BUILTIN_DISASSEMBLE_PAIR_INTERNAL.
	* doc/extend.texi (__builtin_mma_assemble_pair): Rename from this...
	(__builtin_vsx_assemble_pair): ...to this.
	(__builtin_mma_disassemble_pair): Rename from this...
	(__builtin_vsx_disassemble_pair): ...to this.

2021-02-23  Martin Liska  <mliska@suse.cz>

	PR sanitizer/99168
	* ipa-icf.c (sem_variable::merge): Do not merge 2 variables
	with different alignment. That leads to an invalid red zone
	size allocated in runtime.

2021-02-23  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/99204
	* fold-const.c (fold_read_from_constant_string): Check that
	tree_fits_uhwi_p (index) rather than just that index is INTEGER_CST.

2021-02-23  Segher Boessenkool  <segher@kernel.crashing.org>
	    Kewen Lin  <linkw@gcc.gnu.org>

	* config/rs6000/rs6000.md (*rotl<mode>3_insert_3): Renamed to...
	(rotl<mode>3_insert_3): ...this.
	(plus_ior_xor): New code_iterator.
	(define_split for GPR rl*imi): New splitter.
	* config/rs6000/vsx.md (vsx_init_v4si): Use gen_rotldi3_insert_3
	for integer merging.

2021-02-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-tuning-flags.def (cse_sve_vl_constants):
	Define.
	* config/aarch64/aarch64.md (add<mode>3): Force CONST_POLY_INT immediates
	into a register when the above is enabled.
	* config/aarch64/aarch64.c (neoversev1_tunings):
	AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS.
	(aarch64_rtx_costs): Use AARCH64_EXTRA_TUNE_CSE_SVE_VL_CONSTANTS.

2021-02-22  Hans-Peter Nilsson  <hp@axis.com>

	* config/cris/cris.c (cris_print_operand) <'T'>: Change
	valid operand from is now an addi mult-value to shift-value.
	* config/cris/cris.md (*addi): Change expression of scaled
	operand from mult to ashift.
	* config/cris/cris.md (*addi_reload): New insn_and_split.

2021-02-22  John David Anglin  <danglin@gcc.gnu.org>

	PR target/85074
	* config/pa/pa.c (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Define as
	hook_bool_const_tree_hwi_hwi_const_tree_true.
	(pa_asm_output_mi_thunk): Add support for nonzero vcall_offset.

2021-02-22  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR rtl-optimization/98791
	* ira-conflicts.c (process_regs_for_copy): Don't create allocno copies
	for unordered modes.

2021-02-22  Martin Liska  <mliska@suse.cz>

	* tree-inline.c (inline_forbidden_p): Set
	inline_forbidden_reason.

2021-02-22  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.c (vect_bb_vectorization_profitable_p): Dump
	costed subgraph.

2021-02-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99165
	* gimple-ssa-store-merging.c (pass_store_merging::process_store):
	Accumulate changed to ret.

2021-02-21  Uros Bizjak  <ubizjak@gmail.com>

	Revert:
	2020-12-09  Uroš Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.h (REG_ALLOC_ORDER): Remove

2021-02-20  Ilya Leoshkevich  <iii@linux.ibm.com>

	PR target/99134
	* config/s390/vector.md (trunctf<DFP_ALL:mode>2_vr): New
	pattern.
	(trunctf<DFP_ALL:mode>2): Likewise.
	(trunctdtf2_vr): Likewise.
	(trunctdtf2): Likewise.
	(extend<DFP_ALL:mode>tf2_vr): Likewise.
	(extend<DFP_ALL:mode>tf2): Likewise.
	(extendtftd2_vr): Likewise.
	(extendtftd2): Likewise.

2021-02-20  Ilya Leoshkevich  <iii@linux.ibm.com>

	* config/s390/vector.md (*fprx2_to_tf): Rename to fprx2_to_tf,
	add memory alternative.
	(tf_to_fprx2): New pattern.

2021-02-19  Martin Sebor  <msebor@redhat.com>

	PR c/97172
	* attribs.c (init_attr_rdwr_indices): Guard vblist use.
	(attr_access::free_lang_data): Remove a spurious test.

2021-02-19  Nathan Sidwell  <nathan@acm.org>

	* doc/invoke.texi (flang-info-module-read): Document.

2021-02-19  Martin Liska  <mliska@suse.cz>

	PR translation/99167
	* params.opt: Fix typo.

2021-02-19  Richard Biener  <rguenther@suse.de>

	PR middle-end/99122
	* tree-inline.c (inline_forbidden_p): Do not inline functions
	with VLA arguments or return value.

2021-02-19  Jakub Jelinek  <jakub@redhat.com>

	PR target/98998
	* config/arm/arm.md (*stack_protect_combined_set_insn,
	*stack_protect_combined_test_insn): If force_const_mem result
	is not valid general operand, force its address into the destination
	register first.

2021-02-19  Jakub Jelinek  <jakub@redhat.com>

	PR ipa/99034
	* tree-cfg.c (gimple_merge_blocks): If bb a starts with eh landing
	pad or non-local label, put FORCED_LABELs from bb b after that label
	rather than before it.

2021-02-19  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR target/98657
	* config/aarch64/aarch64-sve.md (<ASHIFT:optab><mode>3): Use
	expand_vector_broadcast' to emit the vec_duplicate operand.

2021-02-18  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/96264
	* lra-remat.c (reg_overlap_for_remat_p): Check also output insn
	hard regs.

2021-02-18  H.J. Lu  <hjl.tools@gmail.com>

	PR target/99113
	* varasm.c (get_section): Replace SUPPORTS_SHF_GNU_RETAIN with
	looking up the retain attribute.
	(resolve_unique_section): Likewise.
	(get_variable_section): Likewise.
	(switch_to_section): Likewise.  Warn when a symbol without the
	retain attribute and a symbol with the retain attribute are
	placed in the section with the same name, instead of the used
	attribute.
	* doc/extend.texi: Document the "retain" attribute.

2021-02-18  Nathan Sidwell  <nathan@acm.org>

	PR c++/99023
	* doc/invoke.texi (flang-info-include-translate): Document header
	lookup behaviour.

2021-02-18  Richard Biener  <rguenther@suse.de>

	PR middle-end/99122
	* ipa-fnsummary.c (analyze_function_body): Set
	CIF_FUNCTION_NOT_INLINABLE for VLA parameter calls.
	* tree-inline.c (insert_init_debug_bind): Pass NULL for
	error_mark_node values.
	(force_value_to_type): Do not build V_C_Es for WITH_SIZE_EXPR
	values.
	(setup_one_parameter): Delay force_value_to_type until when
	it's needed.

2021-02-18  Hans-Peter Nilsson  <hp@axis.com>

	PR tree-optimization/99142
	* match.pd (clz cmp 0): Gate replacement on single_use of clz result.

2021-02-18  Jakub Jelinek  <jakub@redhat.com>

	* wide-int-bitmask.h (wide_int_bitmask::wide_int_bitmask (),
	wide_int_bitmask::wide_int_bitmask (uint64_t),
	wide_int_bitmask::wide_int_bitmask (uint64_t, uint64_t),
	wide_int_bitmask::operator ~ () const,
	wide_int_bitmask::operator | (wide_int_bitmask) const,
	wide_int_bitmask::operator & (wide_int_bitmask) const): Use constexpr
	instead of inline.
	* config/i386/i386.h (PTA_3DNOW, PTA_3DNOW_A, PTA_64BIT, PTA_ABM,
	PTA_AES, PTA_AVX, PTA_BMI, PTA_CX16, PTA_F16C, PTA_FMA, PTA_FMA4,
	PTA_FSGSBASE, PTA_LWP, PTA_LZCNT, PTA_MMX, PTA_MOVBE, PTA_NO_SAHF,
	PTA_PCLMUL, PTA_POPCNT, PTA_PREFETCH_SSE, PTA_RDRND, PTA_SSE, PTA_SSE2,
	PTA_SSE3, PTA_SSE4_1, PTA_SSE4_2, PTA_SSE4A, PTA_SSSE3, PTA_TBM,
	PTA_XOP, PTA_AVX2, PTA_BMI2, PTA_RTM, PTA_HLE, PTA_PRFCHW, PTA_RDSEED,
	PTA_ADX, PTA_FXSR, PTA_XSAVE, PTA_XSAVEOPT, PTA_AVX512F, PTA_AVX512ER,
	PTA_AVX512PF, PTA_AVX512CD, PTA_NO_TUNE, PTA_SHA, PTA_PREFETCHWT1,
	PTA_CLFLUSHOPT, PTA_XSAVEC, PTA_XSAVES, PTA_AVX512DQ, PTA_AVX512BW,
	PTA_AVX512VL, PTA_AVX512IFMA, PTA_AVX512VBMI, PTA_CLWB, PTA_MWAITX,
	PTA_CLZERO, PTA_NO_80387, PTA_PKU, PTA_AVX5124VNNIW, PTA_AVX5124FMAPS,
	PTA_AVX512VPOPCNTDQ, PTA_SGX, PTA_AVX512VNNI, PTA_GFNI, PTA_VAES,
	PTA_AVX512VBMI2, PTA_VPCLMULQDQ, PTA_AVX512BITALG, PTA_RDPID,
	PTA_PCONFIG, PTA_WBNOINVD, PTA_AVX512VP2INTERSECT, PTA_PTWRITE,
	PTA_AVX512BF16, PTA_WAITPKG, PTA_MOVDIRI, PTA_MOVDIR64B, PTA_ENQCMD,
	PTA_CLDEMOTE, PTA_SERIALIZE, PTA_TSXLDTRK, PTA_AMX_TILE, PTA_AMX_INT8,
	PTA_AMX_BF16, PTA_UINTR, PTA_HRESET, PTA_KL, PTA_WIDEKL, PTA_AVXVNNI,
	PTA_X86_64_BASELINE, PTA_X86_64_V2, PTA_X86_64_V3, PTA_X86_64_V4,
	PTA_CORE2, PTA_NEHALEM, PTA_WESTMERE, PTA_SANDYBRIDGE, PTA_IVYBRIDGE,
	PTA_HASWELL, PTA_BROADWELL, PTA_SKYLAKE, PTA_SKYLAKE_AVX512,
	PTA_CASCADELAKE, PTA_COOPERLAKE, PTA_CANNONLAKE, PTA_ICELAKE_CLIENT,
	PTA_ICELAKE_SERVER, PTA_TIGERLAKE, PTA_SAPPHIRERAPIDS, PTA_ALDERLAKE,
	PTA_KNL, PTA_BONNELL, PTA_SILVERMONT, PTA_GOLDMONT, PTA_GOLDMONT_PLUS,
	PTA_TREMONT, PTA_KNM): Use constexpr instead of const.

2021-02-18  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/99109
	* gimple-array-bounds.cc (build_zero_elt_array_type): Rename to ...
	(build_printable_array_type): ... this.  Add nelts argument.  For
	overaligned eltype, use TYPE_MAIN_VARIANT (eltype) instead.  If
	nelts, call build_array_type_nelts.
	(array_bounds_checker::check_mem_ref): Use build_printable_array_type
	instead of build_zero_elt_array_type and build_array_type_nelts.

2021-02-18  Jakub Jelinek  <jakub@redhat.com>

	PR target/99104
	* config/i386/i386.c (distance_non_agu_define): Don't call
	extract_insn_cached here.
	(ix86_lea_outperforms): Save and restore recog_data around call
	to distance_non_agu_define and distance_agu_use.
	(ix86_ok_to_clobber_flags): Remove.
	(ix86_avoid_lea_for_add): Don't call ix86_ok_to_clobber_flags.
	(ix86_avoid_lea_for_addr): Likewise.  Adjust function comment.
	* config/i386/i386.md (*lea<mode>): Change from define_insn_and_split
	into define_insn.  Move the splitting to define_peephole2 and
	check there using peep2_regno_dead_p if FLAGS_REG is dead.

2021-02-17  Julian Brown  <julian@codesourcery.com>

	* gimplify.c (gimplify_scan_omp_clauses): Handle ATTACH_DETACH
	for non-decls.

2021-02-17  Xi Ruoyao  <xry111@mengyan1223.wang>

	PR target/98491
	* config/mips/mips.c (mips_symbol_insns): Do not use
	MSA_SUPPORTED_MODE_P if mode is MAX_MACHINE_MODE.

2021-02-16  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR inline-asm/98096
	* stmt.c (resolve_operand_name_1): Take inout operands into account
	for access to labels by names.
	* doc/extend.texi: Describe counting operands for accessing labels.

2021-02-16  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/38474
	* tree-ssa-structalias.c (variable_info::address_taken): New.
	(new_var_info): Initialize address_taken.
	(process_constraint): Set address_taken.
	(solve_constraints): Use the new address_taken flag rather
	than is_reg_var for sorting variables.
	(dump_constraint): Dump the variable number if the name
	is just NULL.

2021-02-16  Jakub Jelinek  <jakub@redhat.com>

	PR target/99100
	* tree-vect-stmts.c (vectorizable_simd_clone_call): For num_calls != 1
	multiply by 4096 and for inbranch by 8192.
	* config/i386/i386.c (ix86_simd_clone_usable): For TARGET_AVX512F,
	return 3, 2 or 1 for mangle letters 'b', 'c' or 'd'.

2021-02-15  Maya Rashish  <coypu@sdf.org>

	* config/aarch64/aarch64.c (aarch64_init_builtins):
	Call SUBTARGET_INIT_BUILTINS.

2021-02-15  Peter Bergner  <bergner@linux.ibm.com>

	PR rtl-optimization/98872
	* init-regs.c (initialize_uninitialized_regs): Skip initialization
	if CONST0_RTX is NULL.

2021-02-15  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/98863
	* rtl-ssa/functions.h (function_info::bb_live_out_info): Delete.
	(function_info::build_info): Turn into a declaration, moving the
	definition to internals.h.
	(function_info::bb_walker): Declare.
	(function_info::create_reg_use): Likewise.
	(function_info::calculate_potential_phi_regs): Take a build_info
	parameter.
	(function_info::place_phis, function_info::create_ebbs): Declare.
	(function_info::calculate_ebb_live_in_for_debug): Likewise.
	(function_info::populate_backedge_phis): Delete.
	(function_info::start_block, function_info::end_block): Declare.
	(function_info::populate_phi_inputs): Delete.
	(function_info::m_potential_phi_regs): Move information to build_info.
	* rtl-ssa/internals.h: New file.
	(function_info::bb_phi_info): New class.
	(function_info::build_info): Moved from functions.h.
	Add a constructor and destructor.
	(function_info::build_info::ebb_use): Delete.
	(function_info::build_info::ebb_def): Likewise.
	(function_info::build_info::bb_live_out): Likewise.
	(function_info::build_info::tmp_ebb_live_in_for_debug): New variable.
	(function_info::build_info::potential_phi_regs): Likewise.
	(function_info::build_info::potential_phi_regs_for_debug): Likewise.
	(function_info::build_info::ebb_def_regs): Likewise.
	(function_info::build_info::bb_phis): Likewise.
	(function_info::build_info::bb_mem_live_out): Likewise.
	(function_info::build_info::bb_to_rpo): Likewise.
	(function_info::build_info::def_stack): Likewise.
	(function_info::build_info::old_def_stack_limit): Likewise.
	* rtl-ssa/internals.inl (function_info::build_info::record_reg_def):
	Remove the regno argument.  Push the previous definition onto the
	definition stack where necessary.
	* rtl-ssa/accesses.cc: Include internals.h.
	* rtl-ssa/changes.cc: Likewise.
	* rtl-ssa/blocks.cc: Likewise.
	(function_info::build_info::build_info): Define.
	(function_info::build_info::~build_info): Likewise.
	(function_info::bb_walker): New class.
	(function_info::bb_walker::bb_walker): Define.
	(function_info::add_live_out_use): Convert a logarithmic-complexity
	test into a linear one.  Allow the same definition to be passed
	multiple times.
	(function_info::calculate_potential_phi_regs): Moved from
	functions.cc.  Take a build_info parameter and store the
	information there instead.
	(function_info::place_phis): New function.
	(function_info::add_entry_block_defs): Update call to record_reg_def.
	(function_info::calculate_ebb_live_in_for_debug): New function.
	(function_info::add_phi_nodes): Use bb_phis to decide which
	registers need phi nodes and initialize ebb_def_regs accordingly.
	Do not add degenerate phis here.
	(function_info::add_artificial_accesses): Use create_reg_use.
	Assert that all definitions are listed in the DF LR sets.
	Update call to record_reg_def.
	(function_info::record_block_live_out): Record live-out register
	values in the phis of successor blocks.  Use the live-out set
	when processing the last block in an EBB, instead of always
	using the live-in sets of successor blocks.  AND the live sets
	with the set of registers that have been defined in the EBB,
	rather than with all potential phi registers.  Cope correctly
	with branches back to the start of the current EBB.
	(function_info::start_block): New function.
	(function_info::end_block): Likewise.
	(function_info::populate_phi_inputs): Likewise.
	(function_info::create_ebbs): Likewise.
	(function_info::process_all_blocks): Rewrite into a multi-phase
	process.
	* rtl-ssa/functions.cc: Include internals.h.
	(function_info::calculate_potential_phi_regs): Move to blocks.cc.
	(function_info::init_function_data): Remove caller.
	* rtl-ssa/insns.cc: Include internals.h
	(function_info::create_reg_use): New function.  Lazily any
	degenerate phis needed by the linear RPO view.
	(function_info::record_use): Use create_reg_use.  When processing
	debug uses, use potential_phi_regs and test it before checking
	whether the register is live on entry to the current EBB.  Lazily
	calculate ebb_live_in_for_debug.
	(function_info::record_call_clobbers): Update call to record_reg_def.
	(function_info::record_def): Likewise.

2021-02-15  Martin Liska  <mliska@suse.cz>

	* toplev.c (init_asm_output): Free output of
	gen_command_line_string function.
	(process_options): Likewise.

2021-02-15  Martin Liska  <mliska@suse.cz>

	* params.opt: Add 2 missing Param keywords.

2021-02-15  Eric Botcazou  <ebotcazou@adacore.com>

	* df-core.c (df_worklist_dataflow_doublequeue): Use proper cast.

2021-02-15  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/99079
	* match.pd (A % (pow2pcst << N) -> A & ((pow2pcst << N) - 1)): Remove
	useless tree_nop_conversion_p (type, TREE_TYPE (@3)) check.  Instead
	require both type and TREE_TYPE (@1) to be integral types and either
	type having smaller or equal precision, or TREE_TYPE (@1) being
	unsigned type, or type being signed type.  If TREE_TYPE (@1)
	doesn't have wrapping overflow, perform the subtraction of one in
	unsigned type.

2021-02-14  Jan Hubicka  <hubicka@ucw.cz>
	    Richard Biener  <rguether@suse.de>

	PR ipa/97346
	* ipa-reference.c (ipa_init): Only conditinally initialize
	reference_vars_to_consider.
	(propagate): Conditionally deninitialize reference_vars_to_consider.
	(ipa_reference_write_optimization_summary): Sanity check that
	reference_vars_to_consider is not allocated.

2021-02-13  Levy Hsu  <admin@levyhsu.com>

	PR target/97417
	* config/riscv/riscv-shorten-memrefs.c (pass_shorten_memrefs): Add
	extend parameter to get_si_mem_base_reg declaration.
	(get_si_mem_base_reg): Add extend parameter.  Set it.
	(analyze): Pass extend arg to get_si_mem_base_reg.
	(transform): Likewise.  Use it when rewriting mems.
	* config/riscv/riscv.c (riscv_legitimize_move): Check for subword
	loads and emit sign/zero extending load followed by subreg move.

2021-02-13  Jim Wilson  <jimw@sifive.com>

	PR target/97417
	* config/riscv/riscv.c (riscv_compressed_lw_address_p): Drop early
	exit when !reload_completed.  Only perform check for compressed reg
	if reload_completed.
	(riscv_rtx_costs): In MEM case, when optimizing	for size and
	shorten memrefs, if not compressible, then increase cost.

2021-02-13  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/98439
	* recog.c (pass_split_before_regstack::gate): Enable even when
	pass_split_before_sched2 is enabled if -fselective-scheduling2 is
	on.

2021-02-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/96166
	* config/i386/mmx.md (*mmx_pshufd_1): Add a combine splitter for
	swap of V2SImode elements in memory into DImode memory rotate by 32.

2021-02-12  Martin Sebor  <msebor@redhat.com>

	* tree-pretty-print.c (print_generic_expr_to_str): Update comment.

2021-02-12  Richard Sandiford  <richard.sandiford@arm.com>

	* rtl-ssa/accesses.cc (function_info::make_use_available): Use
	m_temp_obstack rather than m_obstack to allocate the temporary use.

2021-02-12  Richard Sandiford  <richard.sandiford@arm.com>

	* df-problems.c (df_lr_bb_local_compute): Treat partial definitions
	as read-modify operations.

2021-02-12  Richard Biener  <rguenther@suse.de>

	PR middle-end/38474
	* ipa-fnsummary.c (unmodified_parm_1): Only walk when
	fbi->aa_walk_budget is bigger than zero.  Update
	fbi->aa_walk_budget.
	(param_change_prob): Likewise.
	* ipa-prop.c (detect_type_change_from_memory_writes):
	Properly account walk_aliased_vdefs.
	(parm_preserved_before_stmt_p): Canonicalize updates.
	(parm_ref_data_preserved_p): Likewise.
	(parm_ref_data_pass_through_p): Likewise.
	(determine_known_aggregate_parts): Account own alias queries.

2021-02-12  Martin Liska  <mliska@suse.cz>

	* opts-common.c (decode_cmdline_option): Release werror_arg.
	* opts.c (gen_producer_string): Release output of
	gen_command_line_string.

2021-02-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/38474
	* params.opt (-param=max-store-chains-to-track=): New param.
	(-param=max-stores-to-track=): Likewise.
	* doc/invoke.texi (max-store-chains-to-track): Document.
	(max-stores-to-track): Likewise.
	* gimple-ssa-store-merging.c (pass_store_merging::m_n_chains):
	New.
	(pass_store_merging::m_n_stores): Likewise.
	(pass_store_merging::terminate_and_process_chain): Update
	m_n_stores and m_n_chains.
	(pass_store_merging::process_store): Likewise.   Terminate
	oldest chains if the number of stores or chains get too large.
	(imm_store_chain_info::terminate_and_process_chain): Dump
	chain length.

2021-02-11  Eric Botcazou  <ebotcazou@adacore.com>

	* config/i386/winnt.c (i386_pe_seh_unwind_emit): When switching to
	the cold section, emit a nop before the directive if the previous
	active instruction can throw.

2021-02-11  Peter Bergner  <bergner@linux.ibm.com>

	PR target/99041
	* config/rs6000/predicates.md (mma_assemble_input_operand): Restrict
	memory addresses that are legal for quad word accesses.

2021-02-11  Andrea Corallo  <andrea.corallo@arm.com>

	PR target/98931
	* config/arm/thumb2.md (*doloop_end_internal): Generate
	alternative sequence to handle long range branches.

2021-02-11  Joel Hutton  <joel.hutton@arm.com>

	PR tree-optimization/98772
	* optabs-tree.c (supportable_half_widening_operation): New function
	to check for supportable V8QI->V8HI widening patterns.
	* optabs-tree.h (supportable_half_widening_operation): New function.
	* tree-vect-stmts.c (vect_create_half_widening_stmts): New function
	to create promotion stmts for V8QI->V8HI widening patterns.
	(vectorizable_conversion): Add case for V8QI->V8HI.

2021-02-11  Richard Biener  <rguenther@suse.de>

	* sparseset.h (SPARSESET_ELT_BITS): Remove.
	(SPARSESET_ELT_TYPE): Use unsigned int.
	* fwprop.c: Do not include sparseset.h.

2021-02-10  Jakub Jelinek  <jakub@redhat.com>

	PR c++/99035
	* varasm.c (declare_weak): For -fsyntax-only, allow even
	TREE_ASM_WRITTEN function decls.

2021-02-10  Jakub Jelinek  <jakub@redhat.com>

	PR target/99025
	* config/i386/sse.md (fix<fixunssuffix>_truncv2sfv2di2,
	<insn>v8qiv8hi2, <insn>v8qiv8si2, <insn>v4qiv4si2, <insn>v4hiv4si2,
	<insn>v8qiv8di2, <insn>v4qiv4di2, <insn>v2qiv2di2, <insn>v4hiv4di2,
	<insn>v2hiv2di2, <insn>v2siv2di2): Force operands[1] into REG before
	calling simplify_gen_subreg on it.

2021-02-10  Martin Liska  <mliska@suse.cz>

	* config/nvptx/nvptx.c (nvptx_option_override): Use
	flag_patchable_function_entry instead of the removed
	function_entry_patch_area_size.

2021-02-10  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/99002
	PR tree-optimization/99026
	* gimple-if-to-switch.cc (if_chain::is_beneficial): Fix memory
	leak when adjacent cases are merged.
	* tree-switch-conversion.c (switch_decision_tree::analyze_switch_statement): Use
	release_clusters.
	(make_pass_lower_switch): Remove trailing whitespace.
	* tree-switch-conversion.h (release_clusters): New.

2021-02-10  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/99054
	* cfgrtl.c (rtl-optimization/99054): Return an auto_vec.
	(fixup_partitions): Adjust.
	(rtl_verify_edges): Likewise.

2021-02-10  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/99007
	* gimplify.c (gimplify_scan_omp_clauses): For MEM_REF on reductions,
	temporarily disable gimplify_ctxp->into_ssa around gimplify_expr
	calls.

2021-02-10  Richard Biener  <rguenther@suse.de>

	PR ipa/99029
	* ipa-pure-const.c (propagate_malloc): Use an auto_vec<>
	for callees.

2021-02-10  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99024
	* tree-vect-loop.c (_loop_vec_info::~_loop_vec_info): Only
	clear loop->aux if it is associated with the destroyed loop_vinfo.

2021-02-10  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/99002
	* gimple-if-to-switch.cc (find_conditions): Fix memory leak
	in the function.

2021-02-10  Martin Liska  <mliska@suse.cz>

	PR ipa/99003
	* ipa-icf.c (sem_item::add_reference): Fix memory leak when
	a reference exists.

2021-02-10  Jakub Jelinek  <jakub@redhat.com>

	PR debug/98755
	* dwarf2out.c (prune_unused_types_walk): Mark DW_TAG_variable DIEs
	at class scope for DWARF5+.

2021-02-09  Eric Botcazou  <ebotcazou@adacore.com>

	PR rtl-optimization/96015
	* reorg.c (skip_consecutive_labels): Minor comment tweaks.
	(relax_delay_slots): When deleting a jump to the next active
	instruction over a barrier, first delete the barrier if the
	jump is the only way to reach the target label.

2021-02-09  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	* config/aarch64/aarch64-cost-tables.h: Add entries for vect.mul.
	* config/aarch64/aarch64.c (aarch64_rtx_mult_cost): Use vect.mul for
	vector multiplies and vect.alu for SSRA.
	* config/arm/aarch-common-protos.h (struct vector_cost_table): Define
	vect.mul cost field.
	* config/arm/aarch-cost-tables.h: Add entries for vect.mul.
	* config/arm/arm.c: Likewise.

2021-02-09  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98863
	* tree-ssa-sccvn.h (vn_avail::next_undo): Add.
	* tree-ssa-sccvn.c (last_pushed_avail): New global.
	(rpo_elim::eliminate_push_avail): Chain pushed avails.
	(unwind_state::avail_top): Add.
	(do_unwind): Rewrite unwinding of avail entries.
	(do_rpo_vn): Initialize last_pushed_avail and
	avail_top of the undo state.

2021-02-09  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/99004
	* calls.c (maybe_warn_rdwr_sizes): Change s0 and s1 type from
	const char * to char * and free those pointers after use.

2021-02-09  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/99017
	* tree-vect-slp.c (vect_bb_vectorization_profitable_p): Allow
	zero vector cost entries.

2021-02-08  Andre Vieira  <andre.simoesdiasvieira@arm.com>

	PR middle-end/98974
	* tree-vect-stmts.c (vectorizable_condition): Remove shadow vec_num
	parameter in vectorizable_condition.

2021-02-08  Richard Biener  <rguenther@suse.de>

	PR lto/96591
	* tree.c (walk_tree_1): Walk VECTOR_CST elements.

2021-02-08  Martin Liska  <mliska@suse.cz>

	PR lto/98971
	* cfgexpand.c (pass_expand::execute): Parse per-function option
	flag_patchable_function_entry and use it.
	* common.opt: Remove function_entry_patch_area_size and
	function_entry_patch_area_start global variables.
	* opts.c (parse_and_check_patch_area): New function.
	(common_handle_option): Use it.
	* opts.h (parse_and_check_patch_area): New function.
	* toplev.c (process_options): Parse and use
	function_entry_patch_area_size.

2021-02-08  Martin Sebor  <msebor@redhat.com>

	* doc/extend.texi (attribute malloc): Correct typos.

2021-02-05  Nathan Sidwell  <nathan@acm.org>

	PR driver/98943
	* gcc.c (driver::maybe_run_linker): Check for input file
	accessibility if not linking.

2021-02-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98855
	* tree-vectorizer.h (add_stmt_cost): New overload.
	* tree-vect-slp.c (li_cost_vec_cmp): New.
	(vect_bb_slp_scalar_cost): Cost individual loop regions
	separately.  Account for the scalar instance root stmt.

2021-02-05  Tom de Vries  <tdevries@suse.de>

	PR debug/98656
	* tree-switch-conversion.c (jump_table_cluster::emit): Add loc
	argument.
	(bit_test_cluster::emit): Reuse location_t for newly created
	gswitch statement.
	(switch_decision_tree::try_switch_expansion): Preserve
	location_t.
	* tree-switch-conversion.h: Change function signatures.

2021-02-05  Jakub Jelinek  <jakub@redhat.com>

	PR target/98957
	* config/i386/i386-options.c (m_NONE, m_ALL): Define.
	* config/i386/x86-tune.def (X86_TUNE_BRANCH_PREDICTION_HINTS,
	X86_TUNE_PROMOTE_QI_REGS): Use m_NONE instead of 0U.
	(X86_TUNE_QIMODE_MATH): Use m_ALL instead of ~0U.

2021-02-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (get_high): Define builtin.
	* config/aarch64/aarch64-simd.md (aarch64_get_high<mode>): Define.
	* config/aarch64/arm_neon.h (__GET_HIGH): Delete.
	(vget_high_f16): Reimplement using new builtin.
	(vget_high_f32): Likewise.
	(vget_high_f64): Likewise.
	(vget_high_p8): Likewise.
	(vget_high_p16): Likewise.
	(vget_high_p64): Likewise.
	(vget_high_s8): Likewise.
	(vget_high_s16): Likewise.
	(vget_high_s32): Likewise.
	(vget_high_s64): Likewise.
	(vget_high_u8): Likewise.
	(vget_high_u16): Likewise.
	(vget_high_u32): Likewise.
	(vget_high_u64): Likewise.

2021-02-05  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (get_low): Define builtin.
	* config/aarch64/aarch64-simd.md (aarch64_get_low<mode>): Define.
	* config/aarch64/arm_neon.h (__GET_LOW): Delete.
	(vget_low_f16): Reimplement using new builtin.
	(vget_low_f32): Likewise.
	(vget_low_f64): Likewise.
	(vget_low_p8): Likewise.
	(vget_low_p16): Likewise.
	(vget_low_p64): Likewise.
	(vget_low_s8): Likewise.
	(vget_low_s16): Likewise.
	(vget_low_s32): Likewise.
	(vget_low_s64): Likewise.
	(vget_low_u8): Likewise.
	(vget_low_u16): Likewise.
	(vget_low_u32): Likewise.
	(vget_low_u64): Likewise.

2021-02-05  Kito Cheng  <kito.cheng@sifive.com>

	* gcc.c (print_multilib_info): Check all required argument is provided
	by default arg.

2021-02-05  liuhongt  <hongtao.liu@intel.com>

	PR target/98537
	* config/i386/i386-expand.c (ix86_expand_sse_cmp): Don't
	generate integer mask comparison for 128/256-bits vector when
	op_true/op_false is NULL_RTX or CONSTM1_RTX/CONST0_RTX. Also
	delete redundant !maskcmp condition.
	(ix86_expand_int_vec_cmp): Ditto but no redundant deletion
	here.
	(ix86_expand_sse_movcc): Delete definition of maskcmp, add the
	condition directly to if (maskcmp), add extra check for
	cmpmode, it should be MODE_INT.
	(ix86_expand_fp_vec_cmp): Pass NULL to ix86_expand_sse_cmp's
	parameters op_true/op_false.
	(ix86_use_mask_cmp_p): New.

2021-02-05  liuhongt  <hongtao.liu@intel.com>

	PR target/98172
	* config/i386/x86-tune.def (X86_TUNE_AVX256_UNALIGNED_LOAD_OPTIMAL):
	Remove m_GENERIC from ~list.
	(X86_TUNE_AVX256_UNALIGNED_STORE_OPTIMAL): Ditto.

2021-02-04  David Malcolm  <dmalcolm@redhat.com>

	PR c/97932
	* diagnostic-show-locus.c (compatible_locations_p): Require
	locations in the same macro map to be either both from the
	macro definition, or both from the macro arguments.

2021-02-04  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add
	[su]mull_hi_lane[q] builtin generator macros.
	* config/aarch64/aarch64-simd.md
	(aarch64_<su>mull_hi_lane<mode>_insn): Define.
	(aarch64_<su>mull_hi_lane<mode>): Define.
	(aarch64_<su>mull_hi_laneq<mode>_insn): Define.
	(aarch64_<su>mull_hi_laneq<mode>): Define.
	* config/aarch64/arm_neon.h (vmull_high_lane_s16): Use RTL
	builtin instead of inline asm.
	(vmull_high_lane_s32): Likewise.
	(vmull_high_lane_u16): Likewise.
	(vmull_high_lane_u32): Likewise.
	(vmull_high_laneq_s16): Likewise.
	(vmull_high_laneq_s32): Likewise.
	(vmull_high_laneq_u16): Likewise.
	(vmull_high_laneq_u32): Liekwise.

2021-02-04  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]mull_hi_n
	builtin generator macros.
	* config/aarch64/aarch64-simd.md
	(aarch64_<su>mull_hi_n<mode>_insn): Define.
	(aarch64_<su>mull_hi_n<mode>): Define.
	* config/aarch64/arm_neon.h (vmull_high_n_s16): Use RTL builtin
	instead of inline asm.
	(vmull_high_n_s32): Likewise.
	(vmull_high_n_u16): Likewise.
	(vmull_high_n_u32): Likewise.

2021-02-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98855
	* tree-vect-loop.c (vectorizable_phi): Do not cost
	single-argument PHIs.
	* tree-vect-slp.c (vect_bb_slp_scalar_cost): Likewise.
	* tree-vect-stmts.c (vectorizable_bswap): Also perform
	costing for SLP operation.

2021-02-04  Martin Liska  <mliska@suse.cz>

	* doc/extend.texi: Mention -mprefer-vector-width in target
	attributes.

2021-02-03  Martin Sebor  <msebor@redhat.com>

	PR tree-optimization/98937
	* tree-ssa-strlen.c (strlen_dom_walker::~strlen_dom_walker): Define.
	Flush pointer_query cache.

2021-02-03  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config/rs6000/genfusion.pl (gen_2logical): Add missing
	fixes based on patch review.
	* config/rs6000/fusion.md: Regenerate file.

2021-02-03  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config/rs6000/t-rs6000: Comment out auto generation of
	fusion.md for now.

2021-02-03  Andrew Stubbs  <ams@codesourcery.com>

	* config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX908.
	* config/gcn/gcn.c (gcn_omp_device_kind_arch_isa): Add gfx908.
	(output_file_start): Add gfx908.
	* config/gcn/gcn.opt (gpu_type): Add gfx908.
	* config/gcn/t-gcn-hsa (MULTILIB_OPTIONS): Add march=gfx908.
	(MULTILIB_DIRNAMES): Add gfx908.
	* config/gcn/mkoffload.c (EF_AMDGPU_MACH_AMDGCN_GFX908): New define.
	(main): Recognize gfx908.
	* config/gcn/t-omp-device: Add gfx908.

2021-02-03  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add
	[su]mlsl_hi_lane[q] builtin macro generators.
	* config/aarch64/aarch64-simd.md
	(aarch64_<su>mlsl_hi_lane<mode>_insn): Define.
	(aarch64_<su>mlsl_hi_lane<mode>): Define.
	(aarch64_<su>mlsl_hi_laneq<mode>_insn): Define.
	(aarch64_<su>mlsl_hi_laneq<mode>): Define.
	* config/aarch64/arm_neon.h (vmlsl_high_lane_s16): Use RTL
	builtin instead of inline asm.
	(vmlsl_high_lane_s32): Likewise.
	(vmlsl_high_lane_u16): Likewise.
	(vmlsl_high_lane_u32): Likewise.
	(vmlsl_high_laneq_s16): Likewise.
	(vmlsl_high_laneq_s32): Likewise.
	(vmlsl_high_laneq_u16): Likewise.
	(vmlsl_high_laneq_u32): Likewise.
	(vmlal_high_laneq_u32): Likewise.

2021-02-03  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add
	[su]mlal_hi_lane[q] builtin generator macros.
	* config/aarch64/aarch64-simd.md
	(aarch64_<su>mlal_hi_lane<mode>_insn): Define.
	(aarch64_<su>mlal_hi_lane<mode>): Define.
	(aarch64_<su>mlal_hi_laneq<mode>_insn): Define.
	(aarch64_<su>mlal_hi_laneq<mode>): Define.
	* config/aarch64/arm_neon.h (vmlal_high_lane_s16): Use RTL
	builtin instead of inline asm.
	(vmlal_high_lane_s32): Likewise.
	(vmlal_high_lane_u16): Likewise.
	(vmlal_high_lane_u32): Likewise.
	(vmlal_high_laneq_s16): Likewise.
	(vmlal_high_laneq_s32): Likewise.
	(vmlal_high_laneq_u16): Likewise.
	(vmlal_high_laneq_u32): Likewise.

2021-02-03  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_hi_n
	builtin generator macros.
	* config/aarch64/aarch64-simd.md (aarch64_<su>mlsl_hi_n<mode>_insn):
	Define.
	(aarch64_<su>mlsl_hi_n<mode>): Define.
	* config/aarch64/arm_neon.h (vmlsl_high_n_s16): Use RTL builtin
	instead of inline asm.
	(vmlsl_high_n_s32): Likewise.
	(vmlsl_high_n_u16): Likewise.
	(vmlsl_high_n_u32): Likewise.

2021-02-03  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]mlal_hi_n
	builtin generator macros.
	* config/aarch64/aarch64-simd.md (aarch64_<su>mlal_hi_n<mode>_insn):
	Define.
	(aarch64_<su>mlal_hi_n<mode>): Define.
	* config/aarch64/arm_neon.h (vmlal_high_n_s16): Use RTL builtin
	instead of inline asm.
	(vmlal_high_n_s32): Likewise.
	(vmlal_high_n_u16): Likewise.
	(vmlal_high_n_u32): Likewise.

2021-02-03  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add RTL builtin
	generator macros.
	* config/aarch64/aarch64-simd.md (*aarch64_<su>mlal_hi<mode>):
	Rename to...
	(aarch64_<su>mlal_hi<mode>_insn): This.
	(aarch64_<su>mlal_hi<mode>): Define.
	* config/aarch64/arm_neon.h (vmlal_high_s8): Use RTL builtin
	instead of inline asm.
	(vmlal_high_s16): Likewise.
	(vmlal_high_s32): Likewise.
	(vmlal_high_u8): Likewise.
	(vmlal_high_u16): Likewise.
	(vmlal_high_u32): Likewise.

2021-02-03  Ilya Leoshkevich  <iii@linux.ibm.com>

	* lra-spills.c (remove_pseudos): Call lra_update_insn_recog_data()
	after calling alter_subreg() on a (mem).

2021-02-03  Martin Liska  <mliska@suse.cz>

	PR lto/98912
	* lto-streamer-out.c (produce_lto_section): Fill up missing
	padding.
	* lto-streamer.h (struct lto_section): Add _padding field.

2021-02-03  Richard Biener  <rguenther@suse.de>

	* lto-streamer.c (lto_get_section_name): Free temporary
	buffer.
	* tree-loop-distribution.c
	(loop_distribution::merge_dep_scc_partitions): Free edge data.

2021-02-03  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/97487
	* ifcvt.c (noce_can_force_operand): New function.
	(noce_emit_move_insn): Use it.
	(noce_try_sign_mask): Likewise.  Formatting fix.

2021-02-03  Jakub Jelinek  <jakub@redhat.com>

	PR middle-end/97971
	* lra-constraints.c (process_alt_operands): For inline asm, don't call
	fatal_insn, but instead return false.

2021-02-03  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/98287
	* config/i386/mmx.md (<insn><mode>3): For shifts don't enable expander
	for V1DImode.

2021-02-03  Tamar Christina  <tamar.christina@arm.com>

	PR tree-optimization/98928
	* tree-vect-loop.c (vect_analyze_loop_2): Change
	STMT_VINFO_SLP_VECT_ONLY to STMT_VINFO_SLP_VECT_ONLY_PATTERN.
	* tree-vect-slp-patterns.c (complex_pattern::build): Likewise.
	* tree-vectorizer.h (STMT_VINFO_SLP_VECT_ONLY_PATTERN): New.
	(class _stmt_vec_info): Add slp_vect_pattern_only_p.

2021-02-02  Richard Biener  <rguenther@suse.de>

	* gimple-loop-interchange.cc (prepare_data_references):
	Release vectors.
	* gimple-loop-jam.c (tree_loop_unroll_and_jam): Likewise.
	* tree-ssa-loop-im.c (hoist_memory_references): Likewise.
	* tree-vect-stmts.c (vectorizable_condition): Do not
	allocate vectors.
	(vectorizable_comparison): Likewise.

2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (ursqrte): Define builtin.
	* config/aarch64/aarch64-simd.md (aarch64_ursqrte<mode>): New pattern.
	* config/aarch64/arm_neon.h (vrsqrte_u32): Reimplement using builtin.
	(vrsqrteq_u32): Likewise.

2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (sqxtun2): Define builtin.
	* config/aarch64/aarch64-simd.md (aarch64_sqxtun2<mode>_le): Define.
	(aarch64_sqxtun2<mode>_be): Likewise.
	(aarch64_sqxtun2<mode>): Likewise.
	* config/aarch64/arm_neon.h (vqmovun_high_s16): Reimplement using builtin.
	(vqmovun_high_s32): Likewise.
	(vqmovun_high_s64): Likewise.
	* config/aarch64/iterators.md (UNSPEC_SQXTUN2): Define.

2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (bfdot_lane, bfdot_laneq): Use
	AUTO_FP flags.
	(bfmlalb_lane, bfmlalt_lane, bfmlalb_lane_q, bfmlalt_lane_q): Use FP flags.

2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (fcmla_lane0, fcmla_lane90,
	fcmla_lane180, fcmla_lane270, fcmlaq_lane0, fcmlaq_lane90, fcmlaq_lane180,
	fcmlaq_lane270, scvtf, ucvtf, fcvtzs, fcvtzu, scvtfsi, scvtfdi, ucvtfsi,
	ucvtfdi, fcvtzshf, fcvtzuhf, fmlal_lane_low, fmlsl_lane_low,
	fmlal_laneq_low, fmlsl_laneq_low, fmlalq_lane_low, fmlslq_lane_low,
	fmlalq_laneq_low, fmlslq_laneq_low, fmlal_lane_high, fmlsl_lane_high,
	fmlal_laneq_high, fmlsl_laneq_high, fmlalq_lane_high, fmlslq_lane_high,
	fmlalq_laneq_high, fmlslq_laneq_high): Use FP flags.

2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-builtins.c (FLAG_LOAD): Define.
	* config/aarch64/aarch64-simd-builtins.def (ld1x2, ld2, ld3, ld4, ld2r,
	ld3r, ld4r, ld1, ld1x3, ld1x4): Use LOAD flags.

2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (combine, zip1, zip2,
	uzp1, uzp2, trn1, trn2, simd_bsl): Use AUTO_FP flags.

2021-02-02  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (clrsb, clz, ctz, popcount,
	vec_smult_lane_, vec_smlal_lane_, vec_smult_laneq_, vec_smlal_laneq_,
	vec_umult_lane_, vec_umlal_lane_, vec_umult_laneq_, vec_umlal_laneq_,
	ashl, sshl, ushl, srshl, urshl, sdot_lane, udot_lane, sdot_laneq,
	udot_laneq, usdot_lane, usdot_laneq, sudot_lane, sudot_laneq, ashr,
	ashr_simd, lshr, lshr_simd, srshr_n, urshr_n, ssra_n, usra_n, srsra_n,
	ursra_n, sshll_n, ushll_n, sshll2_n, ushll2_n, ssri_n, usri_n, ssli_n,
	ssli_n, usli_n, bswap, rbit, simd_bsl, eor3q, rax1q, xarq, bcaxq): Use
	NONE builtin flags.

2021-02-02  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/98848
	* tree-vect-patterns.c (vect_recog_over_widening_pattern): Punt if
	STMT_VINFO_DEF_TYPE (last_stmt_info) is vect_reduction_def.

2021-02-02  Kito Cheng  <kito.cheng@sifive.com>

	PR target/98743
	* expr.c: Check mode before calling store_expr.

2021-02-02  Christophe Lyon  <christophe.lyon@linaro.org>

	* config/arm/iterators.md (supf): Remove VORNQ_S and VORNQ_U.
	(VORNQ): Remove.
	* config/arm/mve.md (mve_vornq_s<mode>): New entry for vorn
	instruction using expression ior.
	(mve_vornq_u<mode>): New expander.
	(mve_vornq_f<mode>): Use ior code instead of unspec.
	* config/arm/unspecs.md (VORNQ_S, VORNQ_U, VORNQ_F): Remove.

2021-02-02  Alexandre Oliva  <oliva@adacore.com>

	* tree-nested.c (convert_nonlocal_reference_op): Move
	current_function_decl restore after re-gimplification.
	(convert_local_reference_op): Likewise.

2021-02-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (rshrn, rshrn2):
	Define builtins.
	* config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le):
	Define.
	(aarch64_rshrn<mode>_insn_be): Likewise.
	(aarch64_rshrn<mode>): Likewise.
	(aarch64_rshrn2<mode>_insn_le): Likewise.
	(aarch64_rshrn2<mode>_insn_be): Likewise.
	(aarch64_rshrn2<mode>): Likewise.
	* config/aarch64/aarch64.md (unspec): Add UNSPEC_RSHRN.
	* config/aarch64/arm_neon.h (vrshrn_high_n_s16): Reimplement
	using builtin.
	(vrshrn_high_n_s32): Likewise.
	(vrshrn_high_n_s64): Likewise.
	(vrshrn_high_n_u16): Likewise.
	(vrshrn_high_n_u32): Likewise.
	(vrshrn_high_n_u64): Likewise.
	(vrshrn_n_s16): Likewise.
	(vrshrn_n_s32): Likewise.
	(vrshrn_n_s64): Likewise.
	(vrshrn_n_u16): Likewise.
	(vrshrn_n_u32): Likewise.
	(vrshrn_n_u64): Likewise.

2021-02-01  Sergei Trofimovich  <siarheit@google.com>

	PR tree-optimization/98499
	* ipa-modref.c (analyze_ssa_name_flags): treat RVO
	conservatively and assume all possible side-effects.

2021-02-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (vec_unpacks_hi,
	vec_unpacku_hi_): Define builtins.
	* config/aarch64/arm_neon.h (vmovl_high_s8): Reimplement using
	builtin.
	(vmovl_high_s16): Likewise.
	(vmovl_high_s32): Likewise.
	(vmovl_high_u8): Likewise.
	(vmovl_high_u16): Likewise.
	(vmovl_high_u32): Likewise.

2021-02-01  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (sabdl, uabdl):
	Define builtins.
	* config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): New
	pattern.
	* config/aarch64/aarch64.md (unspec): Define UNSPEC_SABDL,
	UNSPEC_UABDL.
	* config/aarch64/arm_neon.h (vabdl_s8): Reimplemet using
	builtin.
	(vabdl_s16): Likewise.
	(vabdl_s32): Likewise.
	(vabdl_u8): Likewise.
	(vabdl_u16): Likewise.
	(vabdl_u32): Likewise.
	* config/aarch64/iterators.md (ABDL): New int iterator.
	(sur): Handle UNSPEC_SABDL, UNSPEC_UABDL.

2021-02-01  Martin Sebor  <msebor@redhat.com>

	* tree.h (BLOCK_VARS): Add comment.
	(BLOCK_SUBBLOCKS): Same.
	(BLOCK_SUPERCONTEXT): Same.
	(BLOCK_ABSTRACT_ORIGIN): Same.
	(inlined_function_outer_scope_p): Same.

2021-02-01  Martin Sebor  <msebor@redhat.com>

	PR middle-end/97172
	* attribs.c (attr_access::free_lang_data): Define new function.
	* attribs.h (attr_access::free_lang_data): Declare new function.

2021-02-01  Richard Biener  <rguenther@suse.de>

	* vec.h (auto_vec::auto_vec): Add memory stat parameters
	and pass them on.
	* bitmap.h (auto_bitmap::auto_bitmap): Likewise.

2021-02-01  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_<su>mlal_n<mode>,
	aarch64_<su>mlsl<mode>, aarch64_<su>mlsl_n<mode>): Flip mult operands.

2021-02-01  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/98863
	* config/i386/i386-features.c (convert_scalars_to_vector):
	Set DF_RD_PRUNE_DEAD_DEFS.

2021-01-31  Eric Botcazou  <ebotcazou@adacore.com>

	* system.h (SIZE_MAX): Define if not already defined.

2021-01-30  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config/rs6000/genfusion.pl (gen_2logical): New function to
	generate patterns for logical-logical fusion.
	* config/rs6000/fusion.md: Regenerated patterns.
	* config/rs6000/rs6000-cpus.def: Add
	OPTION_MASK_P10_FUSION_2LOGICAL.
	* config/rs6000/rs6000.c (rs6000_option_override_internal):
	Enable logical-logical fusion for p10.
	* config/rs6000/rs6000.opt: Add -mpower10-fusion-2logical.

2021-01-30  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/rs6000.opt: Add periods to new AIX options.

2021-01-30  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/rs6000.opt (mabi=vec-extabi): New.
	(mabi=vec-default): New.
	* config/rs6000/rs6000-c.c (rs6000_target_modify_macros): Define
	__EXTABI__ for AIX Vector extended ABI.
	* config/rs6000/rs6000.c (rs6000_debug_reg_global): Print AIX Vector
	extabi info.
	(conditional_register_usage): If AIX vec_extabi enabled, vs20-vs31
	are non-volatile.
	* doc/invoke.texi (PowerPC mabi): Add AIX vec-extabi and vec-default.

2021-01-30  Jakub Jelinek  <jakub@redhat.com>

	* config/i386/i386-features.c (remove_partial_avx_dependency): Clear
	DF_DEFER_INSN_RESCAN after calling df_process_deferred_rescans.

2021-01-29  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/97701
	* lra-constraints.c (in_class_p): Don't narrow class only for REG
	or MEM.

2021-01-29  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* config/rs6000/rs6000-call.c (rs6000_expand_binup_builtin): Add
	clauses for CODE_FOR_vsx_xvcvuxddp_scale and
	CODE_FOR_vsx_xvcvsxddp_scale to the parameter checking code.

2021-01-29  Andrew MacLeod  <amacleod@redhat.com>

	PR tree-optimization/98866
	* gimple-range-gori.h (gori_compute:set_range_invariant): New.
	* gimple-range-gori.cc (gori_map::set_range_invariant): New.
	(gori_map::m_maybe_invariant): Rename from all_outgoing.
	(gori_map::gori_map): Rename all_outgoing to m_maybe_invariant.
	(gori_map::is_export_p): Ditto.
	(gori_map::calculate_gori): Ditto.
	(gori_compute::set_range_invariant): New.
	* gimple-range.cc (gimple_ranger::range_of_stmt): Set range
	invariant for pointers evaluating to [1, +INF].

2021-01-29  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/98863
	* config/i386/i386-features.c (remove_partial_avx_dependency):
	Do not perform DF analysis.
	(pass_data_remove_partial_avx_dependency): Remove
	TODO_df_finish.

2021-01-29  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]mull_n
	builtin generator macros.
	* config/aarch64/aarch64-simd.md (aarch64_<su>mull_n<mode>):
	Define.
	* config/aarch64/arm_neon.h (vmull_n_s16): Use RTL builtin
	instead of inline asm.
	(vmull_n_s32): Likewise.
	(vmull_n_u16): Likewise.
	(vmull_n_u32): Likewise.

2021-01-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (sabdl2, uabdl2):
	Define builtins.
	* config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>_3):
	Rename to...
	(aarch64_<sur>abdl2<mode>): ... This.
	(<sur>sadv16qi): Adjust use of above.
	* config/aarch64/arm_neon.h (vabdl_high_s8): Reimplement using
	builtin.
	(vabdl_high_s16): Likewise.
	(vabdl_high_s32): Likewise.
	(vabdl_high_u8): Likewise.
	(vabdl_high_u16): Likewise.
	(vabdl_high_u32): Likewise.

2021-01-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (sabal2): Define
	builtin.
	(uabal2): Likewise.
	* config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): New
	pattern.
	* config/aarch64/aarch64.md (unspec): Add UNSPEC_SABAL2 and
	UNSPEC_UABAL2.
	* config/aarch64/arm_neon.h (vabal_high_s8): Reimplement using
	builtin.
	(vabal_high_s16): Likewise.
	(vabal_high_s32): Likewise.
	(vabal_high_u8): Likewise.
	(vabal_high_u16): Likewise.
	(vabal_high_u32): Likewise.
	* config/aarch64/iterators.md (ABAL2): New mode iterator.
	(sur): Handle UNSPEC_SABAL2, UNSPEC_UABAL2.

2021-01-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (sabal): Define
	builtin.
	(uabal): Likewise.
	* config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>_4):
	Rename to...
	(aarch64_<sur>abal<mode>): ... This
	(<sur>sadv16qi): Adust use of the above.
	* config/aarch64/arm_neon.h (vabal_s8): Reimplement using
	builtin.
	(vabal_s16): Likewise.
	(vabal_s32): Likewise.
	(vabal_u8): Likewise.
	(vabal_u16): Likewise.
	(vabal_u32): Likewise.

2021-01-29  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (saddlv, uaddlv):
	Define builtins.
	* config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
	Define.
	* config/aarch64/arm_neon.h (vaddlv_s8): Reimplement using
	builtin.
	(vaddlv_s16): Likewise.
	(vaddlv_u8): Likewise.
	(vaddlv_u16): Likewise.
	(vaddlvq_s8): Likewise.
	(vaddlvq_s16): Likewise.
	(vaddlvq_s32): Likewise.
	(vaddlvq_u8): Likewise.
	(vaddlvq_u16): Likewise.
	(vaddlvq_u32): Likewise.
	(vaddlv_s32): Likewise.
	(vaddlv_u32): Likewise.
	* config/aarch64/iterators.md (VDQV_L): New mode iterator.
	(unspec): Add UNSPEC_SADDLV, UNSPEC_UADDLV.
	(Vwstype): New mode attribute.
	(Vwsuf): Likewise.
	(VWIDE_S): Likewise.
	(USADDLV): New int iterator.
	(su): Handle UNSPEC_SADDLV, UNSPEC_UADDLV.

2021-01-29  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_lane[q]
	builtin generator macros.
	* config/aarch64/aarch64-simd.md (aarch64_vec_<su>mlsl_lane<Qlane>):
	Define.
	* config/aarch64/arm_neon.h (vmlsl_lane_s16): Use RTL builtin
	instead of inline asm.
	(vmlsl_lane_s32): Likewise.
	(vmlsl_lane_u16): Likewise.
	(vmlsl_lane_u32): Likewise.
	(vmlsl_laneq_s16): Likewise.
	(vmlsl_laneq_s32): Likewise.
	(vmlsl_laneq_u16): Likewise.
	(vmlsl_laneq_u32): Likewise.

2021-01-29  Richard Biener  <rguenther@suse.de>

	* doc/invoke.texi (--param max-gcse-memory): Document unit
	of size.
	* gcse.c (gcse_or_cprop_is_too_expensive): Adjust.
	* params.opt (--param max-gcse-memory): Adjust default and
	document unit of size.

2021-01-29  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/98863
	* gcse.c (gcse_or_cprop_is_too_expensive): Use unsigned
	HOST_WIDE_INT for the memory estimate.

2021-01-29  Bin Cheng  <bin.cheng@linux.alibaba.com>
	    Richard Biener  <rguenther@suse.de>

	PR tree-optimization/97627
	* tree-ssa-loop-niter.c (number_of_iterations_exit_assumptions):
	Do not analyze fake edges.

2021-01-29  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/98144
	* df.h (df_mir_bb_info): Add con_visited member.
	* df-problems.c (df_mir_alloc): Initialize con_visited,
	do not fully populate IN and OUT.
	(df_mir_reset): Likewise.
	(df_mir_confluence_0): Set con_visited.
	(df_mir_confluence_n): Properly handle implicitely
	fully populated IN and OUT as designated by con_visited
	and update con_visited accordingly.

2021-01-29  Jakub Jelinek  <jakub@redhat.com>

	PR target/98849
	* config/arm/vec-common.md (mve_vshlq_<supf><mode>,
	vashl<mode>3, vashr<mode>3, vlshr<mode>3): Add
	&& !TARGET_REALLY_IWMMXT to conditions.

2021-01-29  Jakub Jelinek  <jakub@redhat.com>

	PR debug/98331
	* cfgbuild.c (find_bb_boundaries): Reset debug_insn when seeing
	a BARRIER.

2021-01-28  Marek Polacek  <polacek@redhat.com>

	PR c++/94775
	* stor-layout.c (finalize_type_size): If we reset TYPE_USER_ALIGN in
	the main variant, maybe reset it in its variants too.
	* tree.c (check_base_type): Return true only if TYPE_USER_ALIGN match.
	(check_aligned_type): Check if TYPE_USER_ALIGN match.

2021-01-28  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/98730
	* config/arm/arm.c (arm_rtx_costs_internal): Adjust cost of vector
	of constant zero for comparisons.

2021-01-28  Michael Meissner  <meissner@linux.ibm.com>

	* config/rs6000/rs6000.c (rs6000_mangle_decl_assembler_name): Add
	support for mapping built-in function names for long double
	built-in functions if long double is IEEE 128-bit.

2021-01-28  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]mlsl_n
	builtin generator macros.
	* config/aarch64/aarch64-simd.md (aarch64_<su>mlsl_n<mode>):
	Define.
	* config/aarch64/arm_neon.h (vmlsl_n_s16): Use RTL builtin
	instead of inline asm.
	(vmlsl_n_s32): Likewise.
	(vmlsl_n_u16): Likewise.
	(vmlsl_n_u32): Likewise.

2021-01-28  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]mlal_n
	builtin generator macros.
	* config/aarch64/aarch64-simd.md (aarch64_<su>mlal_n<mode>):
	Define.
	* config/aarch64/arm_neon.h (vmlal_n_s16): Use RTL builtin
	instead of inline asm.
	(vmlal_n_s32): Likewise.
	(vmlal_n_u16): Likewise.
	(vmlal_n_u32): Likewise.

2021-01-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (shrn2): Define
	builtin.
	* config/aarch64/aarch64-simd.md (aarch64_shrn2<mode>_insn_le):
	Define.
	(aarch64_shrn2<mode>_insn_be): Likewise.
	(aarch64_shrn2<mode>): Likewise.
	* config/aarch64/arm_neon.h (vshrn_high_n_s16): Reimlplement
	using builtins.
	(vshrn_high_n_s32): Likewise.
	(vshrn_high_n_s64): Likewise.
	(vshrn_high_n_u16): Likewise.
	(vshrn_high_n_u32): Likewise.
	(vshrn_high_n_u64): Likewise.

2021-01-28  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (shrn): Define
	builtin.
	* config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le):
	Define.
	(aarch64_shrn<mode>_insn_be): Likewise.
	(aarch64_shrn<mode>): Likewise.
	* config/aarch64/arm_neon.h (vshrn_n_s16): Reimplement using
	builtins.
	(vshrn_n_s32): Likewise.
	(vshrn_n_s64): Likewise.
	(vshrn_n_u16): Likewise.
	(vshrn_n_u32): Likewise.
	(vshrn_n_u64): Likewise.
	* config/aarch64/iterators.md (vn_mode): New mode attribute.

2021-01-28  Richard Biener  <rguenther@suse.de>

	PR rtl-optimization/80960
	* dse.c (check_mem_read_rtx): Call get_addr on the
	offsetted address.

2021-01-28  Xionghu Luo  <luoxhu@linux.ibm.com>
	    David Edelsohn  <dje.gcc@gmail.com>

	PR target/98799
	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
	Don't generate VIEW_CONVERT_EXPR for fcode ALTIVEC_BUILTIN_VEC_INSERT
	when -m32.
	* config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var):
	Delete.
	* config/rs6000/rs6000.c (rs6000_expand_vector_set): Remove the
	wrapper call rs6000_expand_vector_set_var for cleanup.  Call
	rs6000_expand_vector_set_var_p9 and rs6000_expand_vector_set_var_p8
	directly.
	(rs6000_expand_vector_set_var): Delete.
	(rs6000_expand_vector_set_var_p9): Make static.
	(rs6000_expand_vector_set_var_p8): Make static.

2021-01-28  Xing GUO  <higuoxing@gmail.com>

	* common/config/riscv/riscv-common.c
	(riscv_subset_list::parsing_subset_version): Fix -march option parsing
	when `p` extension exists.

2021-01-27  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/97684
	* ira.c (ira): Call ira_set_pseudo_classes before
	update_equiv_regs when it is necessary.

2021-01-27  Jakub Jelinek  <jakub@redhat.com>

	PR target/98853
	* config/aarch64/aarch64.md (*aarch64_bfxilsi_uxtw): Use
	%w0, %w1 and %2 instead of %0, %1 and %2.

2021-01-27  Aaron Sawdey  <acsawdey@linux.ibm.com>

	* config/rs6000/genfusion.pl: New script to generate
	define_insn_and_split patterns so combine can arrange fused
	instructions next to each other.
	* config/rs6000/fusion.md: New file, generated fused instruction
	patterns for combine.
	* config/rs6000/predicates.md (const_m1_to_1_operand): New predicate.
	(non_update_memory_operand): New predicate.
	* config/rs6000/rs6000-cpus.def: Add OPTION_MASK_P10_FUSION and
	OPTION_MASK_P10_FUSION_LD_CMPI to ISA_3_1_MASKS_SERVER and
	POWERPC_MASKS.
	* config/rs6000/rs6000-protos.h (address_is_non_pfx_d_or_x): Add
	prototype.
	* config/rs6000/rs6000.c (rs6000_option_override_internal):
	Automatically set OPTION_MASK_P10_FUSION and
	OPTION_MASK_P10_FUSION_LD_CMPI if target is power10.
	(rs600_opt_masks): Allow -mpower10-fusion
	in function attributes.
	(address_is_non_pfx_d_or_x): New function.
	* config/rs6000/rs6000.h: Add MASK_P10_FUSION.
	* config/rs6000/rs6000.md: Include fusion.md.
	* config/rs6000/rs6000.opt: Add -mpower10-fusion
	and -mpower10-fusion-ld-cmpi.
	* config/rs6000/t-rs6000: Add dependencies involving fusion.md.

2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add [su]mlal
	builtin generator macros.
	* config/aarch64/aarch64-simd.md (*aarch64_<su>mlal<mode>):
	Rename to...
	(aarch64_<su>mlal<mode>): This.
	* config/aarch64/arm_neon.h (vmlal_s8): Use RTL builtin
	instead of inline asm.
	(vmlal_s16): Likewise.
	(vmlal_s32): Likewise.
	(vmlal_u8): Likewise.
	(vmlal_u16): Likewise.
	(vmlal_u32): Likewise.

2021-01-27  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98854
	* tree-vect-slp.c (vect_build_slp_tree_2): Also build
	PHIs from scalars when the number of CTORs matches the
	number of children.

2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add mls_n builtin
	generator macro.
	* config/aarch64/aarch64-simd.md (*aarch64_mls_elt_merge<mode>):
	Rename to...
	(aarch64_mls_n<mode>): This.
	* config/aarch64/arm_neon.h (vmls_n_s16): Use RTL builtin
	instead of asm.
	(vmls_n_s32): Likewise.
	(vmls_n_u16): Likewise.
	(vmls_n_u32): Likewise.
	(vmlsq_n_s16): Likewise.
	(vmlsq_n_s32): Likewise.
	(vmlsq_n_u16): Likewise.
	(vmlsq_n_u32): Likewise.

2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add mls builtin
	generator macro.
	* config/aarch64/arm_neon.h (vmls_s8): Use RTL builtin rather
	than asm.
	(vmls_s16): Likewise.
	(vmls_s32): Likewise.
	(vmls_u8): Likewise.
	(vmls_u16): Likewise.
	(vmls_u32): Likewise.
	(vmlsq_s8): Likewise.
	(vmlsq_s16): Likewise.
	(vmlsq_s32): Likewise.
	(vmlsq_u8): Likewise.
	(vmlsq_u16): Likewise.
	(vmlsq_u32): Likewise.

2021-01-27  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add mla_n builtin
	generator macro.
	* config/aarch64/aarch64-simd.md (*aarch64_mla_elt_merge<mode>):
	Rename to...
	(aarch64_mla_n<mode>): This.
	* config/aarch64/arm_neon.h (vmla_n_s16): Use RTL builtin
	instead of asm.
	(vmla_n_s32): Likewise.
	(vmla_n_u16): Likewise.
	(vmla_n_u32): Likewise.
	(vmlaq_n_s16): Likewise.
	(vmlaq_n_s32): Likewise.
	(vmlaq_n_u16): Likewise.
	(vmlaq_n_u32): Likewise.

2021-01-27  liuhongt  <hongtao.liu@intel.com>

	PR target/98833
	* config/i386/sse.md (sse2_gt<mode>3): Drop !TARGET_XOP in condition.
	(*sse2_eq<mode>3): Ditto.

2021-01-27  Jakub Jelinek  <jakub@redhat.com>

	* tree-pass.h (PROP_trees): Rename to ...
	(PROP_gimple): ... this.
	* cfgexpand.c (pass_data_expand): Replace PROP_trees with PROP_gimple.
	* passes.c (execute_function_dump, execute_function_todo,
	execute_one_ipa_transform_pass, execute_one_pass): Likewise.
	* varpool.c (ctor_for_folding): Likewise.

2021-01-27  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/97260
	* varpool.c: Include tree-pass.h.
	(ctor_for_folding): In GENERIC return DECL_INITIAL for TREE_READONLY
	non-TREE_SIDE_EFFECTS automatic variables.

2021-01-26  Paul Fee  <paul.f.fee@gmail.com>

	* doc/cpp.texi (__cplusplus): Document value for -std=c++23
	or -std=gnu++23.
	* doc/invoke.texi: Document -std=c++23 and -std=gnu++23.
	* dwarf2out.c (highest_c_language): Recognise C++20 and C++23.
	(gen_compile_unit_die): Recognise C++23.

2021-01-26  Jakub Jelinek  <jakub@redhat.com>

	PR bootstrap/98839
	* dwarf2asm.c (dw2_assemble_integer): Cast DWARF2_ADDR_SIZE to int
	in comparison.

2021-01-26  Jakub Jelinek  <jakub@redhat.com>

	PR target/98681
	* config/aarch64/aarch64.c (aarch64_mask_and_shift_for_ubfiz_p):
	Use UINTVAL (shft_amnt) and UINTVAL (mask) instead of INTVAL (shft_amnt)
	and INTVAL (mask).  Add && INTVAL (mask) > 0 condition.

2021-01-26  Richard Biener  <rguenther@suse.de>

	* gimple-pretty-print.c (dump_binary_rhs): Handle
	VEC_WIDEN_{PLUS,MINUS}_{LO,HI}_EXPR.

2021-01-26  Richard Biener  <rguenther@suse.de>

	PR middle-end/98726
	* tree.h (vector_cst_int_elt): Remove.
	* tree.c (vector_cst_int_elt): Use poly_wide_int for computations,
	make static.

2021-01-26  Andrew Stubbs  <ams@codesourcery.com>

	* config/gcn/gcn.c (gcn_expand_reduc_scalar): Use move instructions
	for V64DFmode min/max reductions.

2021-01-26  Jakub Jelinek  <jakub@redhat.com>

	* dwarf2asm.c (dw2_assemble_integer): Handle size twice as large
	as DWARF2_ADDR_SIZE if x is not a scalar int by emitting it as
	two halves, one with x and the other with const0_rtx, ordered
	depending on endianity.

2021-01-26  Alexandre Oliva  <oliva@adacore.com>

	* gimplify.c (gimplify_decl_expr): Skip asan marking calls for
	temporaries not seen in binding block, and not about to be
	added as gimple variables.

2021-01-25  Martin Sebor  <msebor@redhat.com>

	PR c++/98646
	* tree-ssa-ccp.c (pass_post_ipa_warn::execute): Adjust warning text.

2021-01-25  Martin Liska  <mliska@suse.cz>

	* value-prof.c (get_nth_most_common_value): Use %s instead
	of %qs string.

2021-01-25  Jakub Jelinek  <jakub@redhat.com>

	PR debug/98811
	* configure.ac (HAVE_AS_GDWARF_5_DEBUG_FLAG): Only define if
	readelf -wi is able to read the emitted .debug_info back.
	* configure: Regenerated.

2021-01-25  Martin Liska  <mliska@suse.cz>

	PR gcov-profile/98739
	* common.opt: Add missing sign symbol.
	* value-prof.c (get_nth_most_common_value): Restore handling
	of PROFILE_REPRODUCIBILITY_PARALLEL_RUNS and
	PROFILE_REPRODUCIBILITY_MULTITHREADED.

2021-01-25  Richard Biener  <rguenther@suse.de>

	PR middle-end/98807
	* tree.c (vector_element_bits): Always use precision of
	the element type for boolean vectors.

2021-01-25  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config/rtems.h (STARTFILE_SPEC): Remove qnolinkcmds.
	(ENDFILE_SPEC): Evaluate qnolinkcmds.

2021-01-25  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config/rtems.h (STARTFILE_SPEC): Remove nostdlib and
	nostartfiles handling since this is already done by
	LINK_COMMAND_SPEC.  Evaluate qnolinkcmds.
	(ENDFILE_SPEC): Remove nostdlib and nostartfiles handling since this
	is already done by LINK_COMMAND_SPEC.
	(LIB_SPECS): Remove nostdlib and nodefaultlibs handling since
	this is already done by LINK_COMMAND_SPEC.  Remove qnolinkcmds
	evaluation.

2021-01-25  Jakub Jelinek  <jakub@redhat.com>

	PR testsuite/98771
	* fold-const-call.c (host_size_t_cst_p): Renamed to ...
	(size_t_cst_p): ... this.  Check and store unsigned HOST_WIDE_INT
	value rather than host size_t.
	(fold_const_call): Change type of s2 from size_t to
	unsigned HOST_WIDE_INT.  Use size_t_cst_p instead of
	host_size_t_cst_p.  For strncmp calls, pass MIN (s2, SIZE_MAX)
	instead of s2 as last argument.

2021-01-25  Tamar Christina  <tamar.christina@arm.com>

	* config/arm/iterators.md (rotsplit1, rotsplit2, conj_op, fcmac1,
	VCMLA_OP, VCMUL_OP): New.
	* config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Support vec_dup 0.
	* config/arm/neon.md (cmul<conj_op><mode>3): New.
	* config/arm/unspecs.md (UNSPEC_VCMLA_CONJ, UNSPEC_VCMLA180_CONJ,
	UNSPEC_VCMUL_CONJ): New.
	* config/arm/vec-common.md (cmul<conj_op><mode>3, arm_vcmla<rot><mode>,
	cml<fcmac1><conj_op><mode>4): New.

2021-01-23  Jakub Jelinek  <jakub@redhat.com>

	PR testsuite/97301
	* config/rs6000/mmintrin.h (__m64): Add __may_alias__ attribute.

2021-01-22  Jonathan Wright  <jonathan.wright@arm.com>

	* config/aarch64/aarch64-simd-builtins.def: Add mla builtin
	generator macro.
	* config/aarch64/arm_neon.h (vmla_s8): Use RTL builtin rather
	than asm.
	(vmla_s16): Likewise.
	(vmla_s32): Likewise.
	(vmla_u8): Likewise.
	(vmla_u16): Likewise.
	(vmla_u32): Likewise.
	(vmlaq_s8): Likewise.
	(vmlaq_s16): Likewise.
	(vmlaq_s32): Likewise.
	(vmlaq_u8): Likewise.
	(vmlaq_u16): Likewise.
	(vmlaq_u32): Likewise.

2021-01-22  David Malcolm  <dmalcolm@redhat.com>

	* doc/invoke.texi (GCC_EXTRA_DIAGNOSTIC_OUTPUT): Add @findex
	directive.

2021-01-22  Jakub Jelinek  <jakub@redhat.com>

	PR debug/98796
	* dwarf2out.c (output_file_names): For -gdwarf-5, if there are no
	filenames to emit, still emit the required 0 index directory and
	filename entries that match DW_AT_comp_dir and DW_AT_name of the
	compilation unit.

2021-01-22  Marek Polacek  <polacek@redhat.com>

	PR c++/98545
	* doc/invoke.texi: Update C++ ABI Version 15 description.

2021-01-22  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	PR tree-optimization/98766
	* tree-ssa-math-opts.c (convert_mult_to_fma): Use maybe_le when
	comparing against type size with param_avoid_fma_max_bits.

2021-01-22  Richard Biener  <rguenther@suse.de>

	PR middle-end/98793
	* tree.c (vector_element_bits): Key single-bit bool vector on
	integer mode rather than not vector mode.

2021-01-22  Xionghu Luo  <luoxhu@linux.ibm.com>

	PR target/98093
	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
	Generate ARRAY_REF(VIEW_CONVERT_EXPR) for P8 and later
	platforms.
	* config/rs6000/rs6000.c (rs6000_expand_vector_set_var): Update
	to call different path for P8 and P9.
	(rs6000_expand_vector_set_var_p9): New function.
	(rs6000_expand_vector_set_var_p8): New function.

2021-01-22  Xionghu Luo  <luoxhu@linux.ibm.com>

	PR target/79251
	PR target/98065
	* config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin):
	Ajdust variable index vec_insert from address dereference to
	ARRAY_REF(VIEW_CONVERT_EXPR) tree expression.
	* config/rs6000/rs6000-protos.h (rs6000_expand_vector_set_var):
	New declaration.
	* config/rs6000/rs6000.c (rs6000_expand_vector_set_var): New function.

2021-01-22  Martin Liska  <mliska@suse.cz>

	PR gcov-profile/98739
	* profile.c (compute_value_histograms): Drop time profile for
	-fprofile-reproducible=multithreaded.

2021-01-22  Nathan Sidwell  <nathan@acm.org>

	* gcc.c (process_command): Don't check OPT_SPECIAL_input_file
	existence here.

2021-01-22  Richard Biener  <rguenther@suse.de>

	PR middle-end/98773
	* tree-data-ref.c (initalize_matrix_A): Revert previous
	change, retaining failing on HOST_WIDE_INT_MIN CHREC_RIGHT.

2021-01-22  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/90248
	* match.pd (X cmp 0.0 ? 1.0 : -1.0 -> copysign(1, +-X),
	X cmp 0.0 ? -1.0 : +1.0 -> copysign(1, -+X)): Remove
	simplifications.
	(X * (X cmp 0.0 ? 1.0 : -1.0) -> +-abs(X),
	X * (X cmp 0.0 ? -1.0 : 1.0) -> +-abs(X)): New simplifications.

2021-01-22  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/98255
	* tree-dfa.c (get_ref_base_and_extent): For ARRAY_REFs, sign
	extend index - low_bound from sizetype's precision rather than index
	precision.
	(get_addr_base_and_unit_offset_1): Likewise.
	* tree-ssa-sccvn.c (ao_ref_init_from_vn_reference): Likewise.
	* gimple-fold.c (fold_const_aggregate_ref_1): Likewise.

2021-01-22  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98786
	* tree-ssa-phiopt.c (factor_out_conditional_conversion): Avoid
	adding new uses of abnormals.  Verify we deal with a conditional
	conversion.

2021-01-22  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	PR target/98636
	* optc-save-gen.awk: Add arm_fp16_format to checked_options.

2021-01-22  liuhongt  <hongtao.liu@intel.com>

	PR target/96891
	PR target/98348
	* config/i386/sse.md (VI_128_256): New mode iterator.
	(*avx_cmp<mode>3_1, *avx_cmp<mode>3_2, *avx_cmp<mode>3_3,
	 *avx_cmp<mode>3_4, *avx2_eq<mode>3, *avx2_pcmp<mode>3_1,
	 *avx2_pcmp<mode>3_2, *avx2_gt<mode>3): New
	define_insn_and_split to lower avx512 vector comparison to avx
	version when dest is vector.
	(*<avx512>_cmp<mode>3,*<avx512>_cmp<mode>3,*<avx512>_ucmp<mode>3):
	define_insn_and_split for negating the comparison result.
	* config/i386/predicates.md (float_vector_all_ones_operand):
	New predicate.
	* config/i386/i386-expand.c (ix86_expand_sse_movcc): Use
	general NOT operator without UNSPEC_MASKOP.

2021-01-21  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/98777
	* lra-int.h (lra_pmode_pseudo): New extern.
	* lra.c (lra_pmode_pseudo): New global.
	(lra): Set it up.
	* lra-eliminations.c (eliminate_regs_in_insn): Use it.

2021-01-21  Ilya Leoshkevich  <iii@linux.ibm.com>

	* fwprop.c (fwprop_propagation::classify_result): Allow
	(subreg (mem)) simplifications.

2021-01-21  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_sqdml<SBINQOPS:as>l<mode>):
	Split into...
	(aarch64_sqdmlal<mode>): ... This...
	(aarch64_sqdmlsl<mode>): ... And this.
	(aarch64_sqdml<SBINQOPS:as>l_lane<mode>): Split into...
	(aarch64_sqdmlal_lane<mode>): ... This...
	(aarch64_sqdmlsl_lane<mode>): ... And this.
	(aarch64_sqdml<SBINQOPS:as>l_laneq<mode>): Split into...
	(aarch64_sqdmlsl_laneq<mode>): ... This...
	(aarch64_sqdmlal_laneq<mode>):  ... And this.
	(aarch64_sqdml<SBINQOPS:as>l_n<mode>): Split into...
	(aarch64_sqdmlsl_n<mode>): ... This...
	(aarch64_sqdmlal_n<mode>): ... And this.
	(aarch64_sqdml<SBINQOPS:as>l2<mode>_internal): Split into...
	(aarch64_sqdmlal2<mode>_internal): ... This...
	(aarch64_sqdmlsl2<mode>_internal): ... And this.

2021-01-21  Christophe Lyon  <christophe.lyon@linaro.org>

	* config/arm/arm_mve.h (__arm_vcmpneq_s8): Fix return type.

2021-01-21  Andrea Corallo  <andrea.corallo@arm.com>

	PR target/96372
	* doc/sourcebuild.texi (arm_thumb2_no_arm_v8_1_lob): Document.

2021-01-21  liuhongt  <hongtao.liu@intel.com>

	PR rtl-optimization/98694
	* regcprop.c (copy_value): If SRC had been assigned a mode
	narrower than the copy, we can't link DEST into the chain even
	they have same hard_regno_nregs(i.e. HImode/SImode in i386
	backend).

2021-01-20  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_get_lane<mode>):
	Convert to define_insn_and_split.  Split into simple move when moving
	bottom element.

2021-01-20  Segher Boessenkool  <segher@kernel.crashing.org>

	* config/rs6000/rs6000.c (rs6000_emit_le_vsx_store): Change assert.
	Adjust comment.  Simplify code.

2021-01-20  Jakub Jelinek  <jakub@redhat.com>

	PR debug/98765
	* dwarf2out.c (reset_indirect_string): Also reset indirect strings
	with DW_FORM_line_strp form.
	(prune_unused_types_update_strings): Don't add into debug_str_hash
	indirect strings with DW_FORM_line_strp form.
	(adjust_name_comp_dir): New function.
	(dwarf2out_finish): Call it on CU DIEs after resetting
	debug_line_str_hash.

2021-01-20  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/98722
	* lra-eliminations.c (eliminate_regs_in_insn): Check that target
	has no 3-op add insn to transform insns containing two pluses.

2021-01-20  Richard Biener  <rguenther@suse.de>

	* hwint.h (add_hwi): New function.
	(mul_hwi): Likewise.
	* tree-data-ref.c (initialize_matrix_A): Properly translate
	tree constants and avoid HOST_WIDE_INT_MIN.
	(lambda_matrix_row_add): Avoid undefined integer overflow
	and return true on such overflow.
	(lambda_matrix_right_hermite): Handle overflow from
	lambda_matrix_row_add gracefully.  Simplify previous fix.
	(analyze_subscript_affine_affine): Likewise.

2021-01-20  Eugene Rozenfeld  <erozen@microsoft.com>

	PR tree-optimization/96674
	* match.pd: New patterns: x < y || y == XXX_MIN --> x <= y - 1
	x >= y && y != XXX_MIN --> x > y - 1

2021-01-20  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/98535
	* tree-vect-slp.c (duplicate_and_interleave): Use quick_grow_cleared.
	If the high and low permutes are the same, remove the high permutes
	from the working set and only continue with the low ones.

2021-01-20  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/98721
	* builtins.c (access_ref::inform_access): Don't assume
	SSA_NAME_IDENTIFIER must be non-NULL.  Print messages about
	object whenever allocfn is NULL, rather than only when DECL_P
	is true.  Use %qE instead of %qD for that.  Formatting fixes.

2021-01-20  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98758
	* tree-data-ref.c (int_divides_p): Use lambda_int arguments.
	(lambda_matrix_right_hermite): Avoid undefinedness with
	signed integer abs and multiplication.
	(analyze_subscript_affine_affine): Use lambda_int.

2021-01-20  David Malcolm  <dmalcolm@redhat.com>

	PR debug/98751
	* dwarf2out.c (output_line_info): Rename static variable
	"generation", moving it out of the function to...
	(output_line_info_generation): New.
	(init_sections_and_labels): Likewise, renaming the variable to...
	(init_sections_and_labels_generation): New.
	(dwarf2out_c_finalize): Reset the new variables.

2021-01-19  Martin Sebor  <msebor@redhat.com>

	PR middle-end/98664
	* tree-ssa-live.c (remove_unused_scope_block_p): Keep scopes for
	all functions, even if they're not declared artificial or inline.
	* tree.c (tree_inlined_location): Use macro expansion location
	only if scope traversal fails to expose one.

2021-01-19  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/92294
	* alias.c (compare_base_symbol_refs): Take an extra parameter
	and add the distance between two symbols to it.  Enshrine in
	comments that -1 means "either 0 or 1, but we can't tell
	which at compile time".
	(memrefs_conflict_p): Update call accordingly.
	(rtx_equal_for_memref_p): Likewise.  Take the distance between symbols
	into account.

2021-01-19  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (sqshl, uqshl,
	sqrshl, uqrshl, sqadd, uqadd, sqsub, uqsub, suqadd, usqadd, sqmovn,
	uqmovn, sqxtn2, uqxtn2, sqabs, sqneg, sqdmlal, sqdmlsl, sqdmlal_lane,
	sqdmlsl_lane, sqdmlal_laneq, sqdmlsl_laneq, sqdmlal_n, sqdmlsl_n,
	sqdmlal2, sqdmlsl2, sqdmlal2_lane, sqdmlsl2_lane, sqdmlal2_laneq,
	sqdmlsl2_laneq, sqdmlal2_n, sqdmlsl2_n, sqdmull, sqdmull_lane,
	sqdmull_laneq, sqdmull_n, sqdmull2, sqdmull2_lane, sqdmull2_laneq,
	sqdmull2_n, sqdmulh, sqrdmulh, sqdmulh_lane, sqdmulh_laneq,
	sqrdmulh_lane, sqrdmulh_laneq, sqshrun_n, sqrshrun_n, sqshrn_n,
	uqshrn_n, sqrshrn_n, uqrshrn_n, sqshlu_n, sqshl_n, uqshl_n, sqrdmlah,
	sqrdmlsh, sqrdmlah_lane, sqrdmlsh_lane, sqrdmlah_laneq, sqrdmlsh_laneq,
	sqmovun): Use NONE flags.

2021-01-19  Richard Biener  <rguenther@suse.de>

	PR ipa/98330
	* ipa-modref.c (analyze_stmt): Only record a summary for a
	direct call.

2021-01-19  Richard Biener  <rguenther@suse.de>

	PR middle-end/98638
	* tree-ssanames.c (fini_ssanames): Zero SSA_NAME_DEF_STMT.

2021-01-19  Daniel Hellstrom  <daniel@gaisler.com>

	* config/sparc/rtemself.h (TARGET_OS_CPP_BUILTINS): Add
	built-in define __FIX_LEON3FT_TN0018.

2021-01-19  Richard Biener  <rguenther@suse.de>

	PR ipa/97673
	* tree-inline.c (tree_function_versioning): Set input_location
	to UNKNOWN_LOCATION throughout the function.

2021-01-19  Tobias Burnus  <tobias@codesourcery.com>

	PR fortran/98476
	* omp-low.c (lower_omp_target): Handle nonpointer is_device_ptr.

2021-01-19  Martin Jambor  <mjambor@suse.cz>

	PR ipa/98690
	* ipa-sra.c (ssa_name_only_returned_p): New parameter fun.  Check
	whether non-call exceptions allow removal of a statement.
	(isra_analyze_call): Pass the appropriate function to
	ssa_name_only_returned_p.

2021-01-19  Geng Qi  <gengqi@linux.alibaba.com>

	* config/riscv/arch-canonicalize (longext_sort): New function for
	 sorting 'multi-letter'.
	* config/riscv/multilib-generator: Adjusting the loop of 'alt' in
	'alts'.	The 'arch' may not be the first of 'alts'.
	(_expand_combination): Add underline for the 'ext' without '*'.
	This is because, a single-letter extension can always be treated well
	with a '_' prefix, but it cannot be separated out if it is appended
	to a multi-letter.

2021-01-18  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/97847
	* ira.c (ira): Skip abnormal critical edge splitting.

2021-01-18  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/98727
	* tree-ssa-math-opts.c (match_arith_overflow): Fix up computation of
	second .MUL_OVERFLOW operand for signed multiplication with overflow
	checking if the second operand of multiplication is not constant.

2021-01-18  David Edelsohn  <dje.gcc@gmail.com>

	* doc/invoke.texi (-gdwarf): TPF defaults to version 2 and AIX
	defaults to version 4.

2021-01-18  David Malcolm  <dmalcolm@redhat.com>

	* attribs.h (fndecl_dealloc_argno): New decl.
	* builtins.c (call_dealloc_argno): Split out second half of
	function into...
	(fndecl_dealloc_argno): New.
	* doc/extend.texi (Common Function Attributes): Document the
	interaction between the analyzer and the malloc attribute.
	* doc/invoke.texi (Static Analyzer Options): Likewise.

2021-01-17  David Edelsohn  <dje.gcc@gmail.com>

	* config/rs6000/aix71.h (SUBTARGET_OVERRIDE_OPTIONS): Override
	dwarf_version to 4.
	* config/rs6000/aix72.h (SUBTARGET_OVERRIDE_OPTIONS): Same.

2021-01-17  Martin Jambor  <mjambor@suse.cz>

	PR ipa/98222
	* cgraph.c (clone_of_p): Check also former_clone_of as we climb
	the clone tree.

2021-01-17  Mark Wielaard  <mark@klomp.org>

	* common.opt (gdwarf-): Init(5).
	* doc/invoke.texi (-gdwarf): Document default to 5.

2021-01-16  Kwok Cheung Yeung  <kcy@codesourcery.com>

	* builtin-types.def
	(BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT): Rename
	to...
	(BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT_PTR):
	...this.  Add extra argument.
	* gimplify.c (omp_default_clause): Ensure that event handle is
	firstprivate in a task region.
	(gimplify_scan_omp_clauses): Handle OMP_CLAUSE_DETACH.
	(gimplify_adjust_omp_clauses): Likewise.
	* omp-builtins.def (BUILT_IN_GOMP_TASK): Change function type to
	BT_FN_VOID_OMPFN_PTR_OMPCPYFN_LONG_LONG_BOOL_UINT_PTR_INT_PTR.
	* omp-expand.c (expand_task_call): Add GOMP_TASK_FLAG_DETACH to flags
	if detach clause specified.  Add detach argument when generating
	call to	GOMP_task.
	* omp-low.c (scan_sharing_clauses): Setup data environment for detach
	clause.
	(finish_taskreg_scan): Move field for variable containing the event
	handle to the front of the struct.
	* tree-core.h (enum omp_clause_code): Add OMP_CLAUSE_DETACH.  Fix
	ordering.
	* tree-nested.c (convert_nonlocal_omp_clauses): Handle
	OMP_CLAUSE_DETACH clause.
	(convert_local_omp_clauses): Handle OMP_CLAUSE_DETACH clause.
	* tree-pretty-print.c (dump_omp_clause): Handle OMP_CLAUSE_DETACH.
	* tree.c (omp_clause_num_ops): Add entry for OMP_CLAUSE_DETACH.
	Fix ordering.
	(omp_clause_code_name): Add entry for OMP_CLAUSE_DETACH.  Fix
	ordering.
	(walk_tree_1): Handle OMP_CLAUSE_DETACH.

2021-01-16  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config/nios2/t-rtems: Reset all MULTILIB_* variables.  Shorten
	multilib directory names.  Use MULTILIB_REQUIRED instead of
	MULTILIB_EXCEPTIONS.  Add -mhw-mul -mhw-mulx -mhw-div
	-mcustom-fpu-cfg=fph2 multilib.

2021-01-16  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config/nios2/nios2.c (NIOS2_FPU_CONFIG_NUM): Adjust value.
	(nios2_init_fpu_configs): Provide register values for new
	-mcustom-fpu-cfg=fph2 option variant.
	* doc/invoke.texi (-mcustom-fpu-cfg=fph2): Document new option
	variant.

2021-01-16  Sebastian Huber  <sebastian.huber@embedded-brains.de>

	* config/nios2/nios2.c (nios2_custom_check_insns): Remove
	custom instruction warnings.

2021-01-16  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/96669
	* match.pd ((CST << x) & 1 -> x == 0): New simplification.

2021-01-16  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/96271
	* passes.def: Pass false argument to first two pass_cd_dce
	instances and true to last instance.  Add comment that
	last instance rewrites no longer addressed locals.
	* tree-ssa-dce.c (pass_cd_dce): Add update_address_taken_p member and
	initialize it.
	(pass_cd_dce::set_pass_param): New method.
	(pass_cd_dce::execute): Return TODO_update_address_taken from
	last cd_dce instance.

2021-01-15  Carl Love  <cel@us.ibm.com>

	* config/rs6000/altivec.h (vec_mulh, vec_div, vec_dive, vec_mod):
	New defines.
	* config/rs6000/altivec.md (VIlong): Move define to file vsx.md.
	* config/rs6000/rs6000-builtin.def (DIVES_V4SI, DIVES_V2DI,
	DIVEU_V4SI, DIVEU_V2DI, DIVS_V4SI, DIVS_V2DI, DIVU_V4SI,
	DIVU_V2DI, MODS_V2DI, MODS_V4SI, MODU_V2DI, MODU_V4SI,
	MULHS_V2DI, MULHS_V4SI, MULHU_V2DI, MULHU_V4SI, MULLD_V2DI):
	Add builtin define.
	(MULH, DIVE, MOD):  Add new BU_P10_OVERLOAD_2 definitions.
	* config/rs6000/rs6000-call.c (VSX_BUILTIN_VEC_DIV,
	VSX_BUILTIN_VEC_DIVE, P10_BUILTIN_VEC_MOD, P10_BUILTIN_VEC_MULH):
	New overloaded definitions.
	(builtin_function_type) [P10V_BUILTIN_DIVEU_V4SI,
	P10V_BUILTIN_DIVEU_V2DI, P10V_BUILTIN_DIVU_V4SI,
	P10V_BUILTIN_DIVU_V2DI, P10V_BUILTIN_MODU_V2DI,
	P10V_BUILTIN_MODU_V4SI, P10V_BUILTIN_MULHU_V2DI,
	P10V_BUILTIN_MULHU_V4SI]: Add case
	statement for builtins.
	* config/rs6000/rs6000.md (bits): Add new attribute sizes V4SI, V2DI.
	* config/rs6000/vsx.md (VIlong): Moved from config/rs6000/altivec.md.
	(UNSPEC_VDIVES, UNSPEC_VDIVEU): New unspec definitions.
	(vsx_mul_v2di): Add if TARGET_POWER10 statement.
	(vsx_udiv_v2di): Add if TARGET_POWER10 statement.
	(dives_<mode>, diveu_<mode>, div<mode>3, uvdiv<mode>3,
	mods_<mode>, modu_<mode>, mulhs_<mode>, mulhu_<mode>, mulv2di3):
	Add define_insn, mode is VIlong.
	* doc/extend.texi (vec_mulh, vec_mul, vec_div, vec_dive, vec_mod):
	Add builtin descriptions.

2021-01-15  Eric Botcazou  <ebotcazou@adacore.com>

	* final.c (final_start_function_1): Reset force_source_line.

2021-01-15  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/96669
	* match.pd (((1 << A) & 1) != 0 -> A == 0,
	((1 << A) & 1) == 0 -> A != 0): Generalize for 1s replaced by
	possibly different power of two constants and to right shift too.

2021-01-15  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/96681
	* match.pd ((x < 0) ^ (y < 0) to (x ^ y) < 0): New simplification.
	((x >= 0) ^ (y >= 0) to (x ^ y) < 0): Likewise.
	((x < 0) ^ (y >= 0) to (x ^ y) >= 0): Likewise.
	((x >= 0) ^ (y < 0) to (x ^ y) >= 0): Likewise.

2021-01-15  Alexandre Oliva  <oliva@adacore.com>

	* opts.c (gen_command_line_string): Exclude -dumpbase-ext.

2021-01-15  Tamar Christina  <tamar.christina@arm.com>

	* config/aarch64/aarch64-simd.md (cml<fcmac1><conj_op><mode>4,
	cmul<conj_op><mode>3): New.
	* config/aarch64/iterators.md (UNSPEC_FCMUL,
	UNSPEC_FCMUL180, UNSPEC_FCMLA_CONJ, UNSPEC_FCMLA180_CONJ,
	UNSPEC_CMLA_CONJ, UNSPEC_CMLA180_CONJ, UNSPEC_CMUL, UNSPEC_CMUL180,
	FCMLA_OP, FCMUL_OP, conj_op, rotsplit1, rotsplit2, fcmac1, sve_rot1,
	sve_rot2, SVE2_INT_CMLA_OP, SVE2_INT_CMUL_OP, SVE2_INT_CADD_OP): New.
	(rot): Add UNSPEC_FCMUL, UNSPEC_FCMUL180.
	(rot_op): Renamed to conj_op.
	* config/aarch64/aarch64-sve.md (cml<fcmac1><conj_op><mode>4,
	cmul<conj_op><mode>3): New.
	* config/aarch64/aarch64-sve2.md (cml<fcmac1><conj_op><mode>4,
	cmul<conj_op><mode>3): New.

2021-01-15  David Malcolm  <dmalcolm@redhat.com>

	PR bootstrap/98696
	* diagnostic.c
	(selftest::test_print_parseable_fixits_bytes_vs_display_columns):
	Escape the tempfile name when constructing the expected output.

2021-01-15  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd.md (*aarch64_<su>mlsl_hi<mode>):
	Rename to...
	(aarch64_<su>mlsl_hi<mode>): ... This.
	(aarch64_<su>mlsl_hi<mode>): Define.
	(*aarch64_<su>mlsl<mode): Rename to...
	(aarch64_<su>mlsl<mode): ... This.
	* config/aarch64/aarch64-simd-builtins.def (smlsl, umlsl,
	smlsl_hi, umlsl_hi): Define builtins.
	* config/aarch64/arm_neon.h (vmlsl_high_s8, vmlsl_high_s16,
	vmlsl_high_s32, vmlsl_high_u8, vmlsl_high_u16, vmlsl_high_u32,
	vmlsl_s8, vmlsl_s16, vmlsl_s32, vmlsl_u8,
	vmlsl_u16, vmlsl_u32): Reimplement with builtins.

2021-01-15  Uroš Bizjak  <ubizjak@gmail.com>

	* config/i386/i386-c.c (ix86_target_macros):
	Use cpp_define_formatted for __SIZEOF_FLOAT80__ definition.

2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/88836
	* config.gcc (aarch64*-*-*): Add aarch64-cc-fusion.o to extra_objs.
	* Makefile.in (RTL_SSA_H): New variable.
	* config/aarch64/t-aarch64 (aarch64-cc-fusion.o): New rule.
	* config/aarch64/aarch64-protos.h (make_pass_cc_fusion): Declare.
	* config/aarch64/aarch64-passes.def: Add pass_cc_fusion after
	pass_combine.
	* config/aarch64/aarch64-cc-fusion.cc: New file.

2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>

	* recog.h (insn_change_watermark::~insn_change_watermark): Avoid
	calling cancel_changes for changes that no longer exist.

2021-01-15  Richard Sandiford  <richard.sandiford@arm.com>

	* rtl-ssa/functions.h (function_info::ref_defs): Rename to...
	(function_info::reg_defs): ...this.
	* rtl-ssa/member-fns.inl (function_info::ref_defs): Rename to...
	(function_info::reg_defs): ...this.

2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/71233
	* config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.

2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>

	Revert:
	2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/71233
	* config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.

2021-01-15  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/96376
	* tree-vect-stmts.c (get_load_store_type): Disregard alignment
	for VMAT_INVARIANT.

2021-01-15  Martin Liska  <mliska@suse.cz>

	* doc/install.texi: Document that some tests need pytest module.
	* doc/sourcebuild.texi: Likewise.

2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/71233
	* config/arm/arm_neon.h (vceqz_p64, vceqq_p64, vceqzq_p64): New.

2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>

	* config/arm/mve.md (mve_vshrq_n_s<mode>_imm): New entry.
	(mve_vshrq_n_u<mode>_imm): Likewise.
	* config/arm/neon.md (vashr<mode>3, vlshr<mode>3): Move to ...
	* config/arm/vec-common.md: ... here.

2021-01-15  Christophe Lyon  <christophe.lyon@linaro.org>

	* config/arm/mve.md (mve_vshlq_<supf><mode>): Move to
	vec-commond.md.
	* config/arm/neon.md (vashl<mode>3): Delete.
	* config/arm/vec-common.md (mve_vshlq_<supf><mode>): New.
	(vasl<mode>3): New expander.

2021-01-15  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98685
	* tree-vect-slp.c (vect_schedule_slp_node): Refactor handling
	of vector extern defs.

2021-01-14  David Malcolm  <dmalcolm@redhat.com>

	PR jit/98586
	* diagnostic.c (diagnostic_kind_text): Break out this array
	from...
	(diagnostic_build_prefix): ...here.
	(fancy_abort): Detect when diagnostic_initialize has not yet been
	called and fall back to a minimal implementation of printing the
	ICE, rather than segfaulting in internal_error.

2021-01-14  David Malcolm  <dmalcolm@redhat.com>

	* diagnostic.c (diagnostic_initialize): Eliminate
	parseable_fixits_p in favor of initializing extra_output_kind from
	GCC_EXTRA_DIAGNOSTIC_OUTPUT.
	(convert_column_unit): New function, split out from...
	(diagnostic_converted_column): ...this.
	(print_parseable_fixits): Add "column_unit" and "tabstop" params.
	Use them to call convert_column_unit on the column values.
	(diagnostic_report_diagnostic): Eliminate conditional on
	parseable_fixits_p in favor of a switch statement on
	extra_output_kind, passing the appropriate values to the new
	params of print_parseable_fixits.
	(selftest::test_print_parseable_fixits_none): Update for new
	params of print_parseable_fixits.
	(selftest::test_print_parseable_fixits_insert): Likewise.
	(selftest::test_print_parseable_fixits_remove): Likewise.
	(selftest::test_print_parseable_fixits_replace): Likewise.
	(selftest::test_print_parseable_fixits_bytes_vs_display_columns):
	New.
	(selftest::diagnostic_c_tests): Call it.
	* diagnostic.h (enum diagnostics_extra_output_kind): New.
	(diagnostic_context::parseable_fixits_p): Delete field in favor
	of...
	(diagnostic_context::extra_output_kind): ...this new field.
	* doc/invoke.texi (Environment Variables): Add
	GCC_EXTRA_DIAGNOSTIC_OUTPUT.
	* opts.c (common_handle_option): Update handling of
	OPT_fdiagnostics_parseable_fixits for change to diagnostic_context
	fields.

2021-01-14  Tamar Christina  <tamar.christina@arm.com>

	* tree-vect-slp-patterns.c (class complex_operations_pattern,
	complex_operations_pattern::matches,
	complex_operations_pattern::recognize,
	complex_operations_pattern::build): New.
	(slp_patterns): Use it.

2021-01-14  Tamar Christina  <tamar.christina@arm.com>

	* internal-fn.def (COMPLEX_FMS, COMPLEX_FMS_CONJ): New.
	* optabs.def (cmls_optab, cmls_conj_optab): New.
	* doc/md.texi: Document them.
	* tree-vect-slp-patterns.c (class complex_fms_pattern,
	complex_fms_pattern::matches, complex_fms_pattern::recognize,
	complex_fms_pattern::build): New.

2021-01-14  Tamar Christina  <tamar.christina@arm.com>

	* internal-fn.def (COMPLEX_FMA, COMPLEX_FMA_CONJ): New.
	* optabs.def (cmla_optab, cmla_conj_optab): New.
	* doc/md.texi: Document them.
	* tree-vect-slp-patterns.c (vect_match_call_p,
	class complex_fma_pattern, vect_slp_reset_pattern,
	complex_fma_pattern::matches, complex_fma_pattern::recognize,
	complex_fma_pattern::build): New.

2021-01-14  Tamar Christina  <tamar.christina@arm.com>

	* internal-fn.def (COMPLEX_MUL, COMPLEX_MUL_CONJ): New.
	* optabs.def (cmul_optab, cmul_conj_optab): New.
	* doc/md.texi: Document them.
	* tree-vect-slp-patterns.c (vect_match_call_complex_mla,
	vect_normalize_conj_loc, is_eq_or_top, vect_validate_multiplication,
	vect_build_combine_node, class complex_mul_pattern,
	complex_mul_pattern::matches, complex_mul_pattern::recognize,
	complex_mul_pattern::build): New.

2021-01-14  Tamar Christina  <tamar.christina@arm.com>

	* tree-vect-slp.c (optimize_load_redistribution_1): New.
	(optimize_load_redistribution, vect_is_slp_load_node): New.
	(vect_match_slp_patterns): Use it.

2021-01-14  Tamar Christina  <tamar.christina@arm.com>

	* tree-vect-slp-patterns.c (complex_add_pattern::build):
	Elide nodes.

2021-01-14  Thomas Schwinge  <thomas@codesourcery.com>

	* config/gcn/mkoffload.c (main): Create an offload image only in
	64-bit configurations.

2021-01-14  H.J. Lu  <hjl.tools@gmail.com>

	PR target/98667
	* config/i386/i386-options.c (ix86_option_override_internal):
	Issue an error for -fcf-protection with CF_BRANCH when compiling
	for 32-bit non-TARGET_CMOV targets.

2021-01-14  Uroš Bizjak  <ubizjak@gmail.com>

	PR target/98671
	* config/i386/i386-options.c (ix86_valid_target_attribute_inner_p):
	Remove declaration and initialization of shadow variable "ret".
	(ix86_option_override_internal): Remove delcaration of
	shadow variable "i".  Redeclare shadowed variable to unsigned.
	* common/config/i386/i386-common.c (pta_size): Redeclare to unsigned.
	* config/i386/i386-builtins.c (get_builtin_code_for_version):
	Update for redeclaration.
	* config/i386/i386.h (pta_size): Ditto.

2021-01-14  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98674
	* tree-data-ref.c (base_supports_access_fn_components_p): New.
	(initialize_data_dependence_relation): For two bases without
	possible access fns resort to type size equality when determining
	shape compatibility.

2021-01-14  Prathamesh Kulkarni  <prathamesh.kulkarni@linaro.org>

	PR target/66791
	* config/arm/arm_neon.h: Replace calls to __builtin_vcge* by
	<=, >= operators in vcle and vcge intrinsics respectively.
	* config/arm/arm_neon_builtins.def: Remove entry for
	vcge and vcgeu.

2021-01-14  Uroš Bizjak  <ubizjak@gmail.com>

	PR target/98671
	* config/i386/i386-options.c (ix86_function_specific_save):
	Remove redundant assignment to opts->x_ix86_branch_cost.
	* config/i386/i386.c (ix86_prefetch_sse):
	Rename from x86_prefetch_sse.  Update all uses.
	* config/i386/i386.h: Update for rename.
	* config/i386/i386-options.h: Ditto.

2021-01-14  Jakub Jelinek  <jakub@redhat.com>

	PR target/98670
	* config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3,
	*sse4_1_zero_extendv4hiv4si2_3, *sse4_1_zero_extendv2siv2di2_3):
	Use Bm instead of m for non-avx.  Add isa attribute.

2021-01-14  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/96688
	* match.pd (~(X >> Y) -> ~X >> Y): New simplification if
	~X can be simplified.

2021-01-14  Richard Sandiford  <richard.sandiford@arm.com>

	* tree-vect-stmts.c (vect_model_load_cost): Account for unused
	IFN_LOAD_LANES results.

2021-01-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_<su>xtl<mode>):
	Define.
	(aarch64_xtn<mode>): Likewise.
	* config/aarch64/aarch64-simd-builtins.def (sxtl, uxtl, xtn):
	Define
	builtins.
	* config/aarch64/arm_neon.h (vmovl_s8): Reimplement using
	builtin.
	(vmovl_s16): Likewise.
	(vmovl_s32): Likewise.
	(vmovl_u8): Likewise.
	(vmovl_u16): Likewise.
	(vmovl_u32): Likewise.
	(vmovn_s16): Likewise.
	(vmovn_s32): Likewise.
	(vmovn_s64): Likewise.
	(vmovn_u16): Likewise.
	(vmovn_u32): Likewise.
	(vmovn_u64): Likewise.

2021-01-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_<su>qxtn2<mode>_le):
	Define.
	(aarch64_<su>qxtn2<mode>_be): Likewise.
	(aarch64_<su>qxtn2<mode>): Likewise.
	* config/aarch64/aarch64-simd-builtins.def (sqxtn2, uqxtn2):
	Define builtins.
	* config/aarch64/iterators.md (SAT_TRUNC): Define code_iterator.
	(su): Handle ss_truncate and us_truncate.
	* config/aarch64/arm_neon.h (vqmovn_high_s16): Reimplement using
	builtin.
	(vqmovn_high_s32): Likewise.
	(vqmovn_high_s64): Likewise.
	(vqmovn_high_u16): Likewise.
	(vqmovn_high_u32): Likewise.
	(vqmovn_high_u64): Likewise.

2021-01-14  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_xtn2<mode>_le):
	Define.
	(aarch64_xtn2<mode>_be): Likewise.
	(aarch64_xtn2<mode>): Likewise.
	* config/aarch64/aarch64-simd-builtins.def (xtn2): Define
	builtins.
	* config/aarch64/arm_neon.h (vmovn_high_s16): Reimplement using
	builtins.
	(vmovn_high_s32): Likewise.
	(vmovn_high_s64): Likewise.
	(vmovn_high_u16): Likewise.
	(vmovn_high_u32): Likewise.
	(vmovn_high_u64): Likewise.

2021-01-13  Stafford Horne  <shorne@gmail.com>

	* config/or1k/or1k.h (ASM_PREFERRED_EH_DATA_FORMAT): New macro.

2021-01-13  Stafford Horne  <shorne@gmail.com>

	* config/or1k/linux.h (TARGET_ASM_FILE_END): Define macro.

2021-01-13  Stafford Horne  <shorne@gmail.com>

	* config/or1k/or1k.h (TARGET_CPU_CPP_BUILTINS): Add builtin
	  define for __or1k_hard_float__.

2021-01-13  Stafford Horne  <shorne@gmail.com>

	* config/or1k/or1k.h (NO_PROFILE_COUNTERS): Define as 1.
	(PROFILE_HOOK): Define to call _mcount.
	(FUNCTION_PROFILER): Change from abort to no-op.

2021-01-13  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/96691
	* match.pd ((~X | C) ^ D -> (X | C) ^ (~D ^ C),
	(~X & C) ^ D -> (X & C) ^ (D ^ C)): New simplifications if
	(~D ^ C) or (D ^ C) can be simplified.

2021-01-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/92645
	* match.pd (BIT_FIELD_REF to conversion): Delay canonicalization
	until after vector lowering.

2021-01-13  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (fnma<mode>4): Extend from SVE_FULL_I
	to SVE_I.
	(@aarch64_pred_fnma<mode>, cond_fnma<mode>, *cond_fnma<mode>_2)
	(*cond_fnma<mode>_4, *cond_fnma<mode>_any): Likewise.

2021-01-13  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (fma<mode>4): Extend from SVE_FULL_I
	to SVE_I.
	(@aarch64_pred_fma<mode>, cond_fma<mode>, *cond_fma<mode>_2)
	(*cond_fma<mode>_4, *cond_fma<mode>_any): Likewise.

2021-01-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/92645
	* tree-vect-slp.c (vect_build_slp_tree_1): Relax supported
	BIT_FIELD_REF argument.
	(vect_build_slp_tree_2): Record the desired vector type
	on the external vector def.
	(vectorizable_slp_permutation): Handle required punning
	of existing vector defs.

2021-01-13  Richard Sandiford  <richard.sandiford@arm.com>

	* rtl-ssa/accesses.h (def_lookup): Fix order of comparison results.

2021-01-13  Richard Sandiford  <richard.sandiford@arm.com>

	* config/sh/sh.md (movsf_ie): Remove operands[2] test.

2021-01-13  Samuel Thibault  <samuel.thibault@ens-lyon.org>

	* config.gcc [$target == *-*-gnu*]: Enable
	'default_gnu_indirect_function'.

2021-01-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/95905
	* optabs.c (expand_vec_perm_const): Don't force v0 and v1 into
	registers before calling targetm.vectorize.vec_perm_const, only after
	that.
	* config/i386/i386-expand.c (ix86_vectorize_vec_perm_const): Handle
	two argument permutation when one operand is zero vector and only
	after that force operands into registers.
	* config/i386/sse.md (*avx2_zero_extendv16qiv16hi2_1): New
	define_insn_and_split pattern.
	(*avx512bw_zero_extendv32qiv32hi2_1): Likewise.
	(*avx512f_zero_extendv16hiv16si2_1): Likewise.
	(*avx2_zero_extendv8hiv8si2_1): Likewise.
	(*avx512f_zero_extendv8siv8di2_1): Likewise.
	(*avx2_zero_extendv4siv4di2_1): Likewise.
	* config/mips/mips.c (mips_vectorize_vec_perm_const): Force operands
	into registers.
	* config/arm/arm.c (arm_vectorize_vec_perm_const): Likewise.
	* config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Likewise.
	* config/ia64/ia64.c (ia64_vectorize_vec_perm_const): Likewise.
	* config/aarch64/aarch64.c (aarch64_vectorize_vec_perm_const): Likewise.
	* config/rs6000/rs6000.c (rs6000_vectorize_vec_perm_const): Likewise.
	* config/gcn/gcn.c (gcn_vectorize_vec_perm_const): Likewise.  Use std::swap.

2021-01-13  Martin Liska  <mliska@suse.cz>

	PR tree-optimization/98455
	* gimple-if-to-switch.cc (condition_info::record_phi_mapping):
	Record also virtual PHIs.
	(pass_if_to_switch::execute): Return TODO_cleanup_cfg only
	conditionally.

2021-01-13  Jonathan Wakely  <jwakely@redhat.com>

	* doc/invoke.texi (C++ Modules): Fix typos.

2021-01-13  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98640
	* tree-ssa-sccvn.c (visit_nary_op): Do not try to
	handle plus or minus from a truncated operand to be
	sign-extended.

2021-01-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/96938
	* config/i386/i386.md (*btr<mode>_1, *btr<mode>_2): New
	define_insn_and_split patterns.
	(splitter after *btr<mode>_2): New splitter.

2021-01-13  Martin Liska  <mliska@suse.cz>

	PR ipa/98652
	* cgraphunit.c (analyze_functions): Remove dead code.

2021-01-13  Qian Jianhua  <qianjh@cn.fujitsu.com>

	* config/aarch64/aarch64-cost-tables.h (a64fx_extra_costs): New.
	* config/aarch64/aarch64.c (a64fx_addrcost_table): New.
	(a64fx_regmove_cost, a64fx_vector_cost): New.
	(a64fx_tunings): Use the new added cost tables.

2021-01-13  Jakub Jelinek  <jakub@redhat.com>

	PR target/95905
	* config/i386/predicates.md (pmovzx_parallel): New predicate.
	* config/i386/sse.md (*sse4_1_zero_extendv8qiv8hi2_3): New
	define_insn_and_split pattern.
	(*sse4_1_zero_extendv4hiv4si2_3): Likewise.
	(*sse4_1_zero_extendv2siv2di2_3): Likewise.

2021-01-13  Julian Brown  <julian@codesourcery.com>

	* config/gcn/gcn.c (gcn_conditional_register_usage): Remove dead code
	to fix v0 register.

2021-01-13  Julian Brown  <julian@codesourcery.com>

	* config/gcn/gcn.c (gcn_md_reorg): Fix case where EXEC reg is live
	on entry to a BB.

2021-01-13  Julian Brown  <julian@codesourcery.com>

	* config/gcn/gcn-valu.md (recip<mode>2<exec>, recip<mode>2): Use unspec
	for reciprocal-approximation instructions.
	(div<mode>3): Use fused multiply-accumulate operations for reciprocal
	refinement and division result.
	* config/gcn/gcn.md (UNSPEC_RCP): New unspec constant.

2021-01-13  Julian Brown  <julian@codesourcery.com>

	* config/gcn/gcn-valu.md (subdf): Rename to...
	(subdf3): This.

2021-01-12  Martin Liska  <mliska@suse.cz>

	* gcov.c (source_info::debug): Fix printf format for 32-bit hosts.

2021-01-12  Andrea Corallo  <andrea.corallo@arm.com>

	* function-abi.h: Fix typo.

2021-01-12  Christophe Lyon  <christophe.lyon@linaro.org>

	PR target/97875
	PR target/97875
	* config/arm/arm.h (ARM_HAVE_NEON_V8QI_LDST): New macro.
	(ARM_HAVE_NEON_V16QI_LDST, ARM_HAVE_NEON_V4HI_LDST): Likewise.
	(ARM_HAVE_NEON_V8HI_LDST, ARM_HAVE_NEON_V2SI_LDST): Likewise.
	(ARM_HAVE_NEON_V4SI_LDST, ARM_HAVE_NEON_V4HF_LDST): Likewise.
	(ARM_HAVE_NEON_V8HF_LDST, ARM_HAVE_NEON_V4BF_LDST): Likewise.
	(ARM_HAVE_NEON_V8BF_LDST, ARM_HAVE_NEON_V2SF_LDST): Likewise.
	(ARM_HAVE_NEON_V4SF_LDST, ARM_HAVE_NEON_DI_LDST): Likewise.
	(ARM_HAVE_NEON_V2DI_LDST): Likewise.
	(ARM_HAVE_V8QI_LDST, ARM_HAVE_V16QI_LDST): Likewise.
	(ARM_HAVE_V4HI_LDST, ARM_HAVE_V8HI_LDST): Likewise.
	(ARM_HAVE_V2SI_LDST, ARM_HAVE_V4SI_LDST, ARM_HAVE_V4HF_LDST): Likewise.
	(ARM_HAVE_V8HF_LDST, ARM_HAVE_V4BF_LDST, ARM_HAVE_V8BF_LDST): Likewise.
	(ARM_HAVE_V2SF_LDST, ARM_HAVE_V4SF_LDST, ARM_HAVE_DI_LDST): Likewise.
	(ARM_HAVE_V2DI_LDST): Likewise.
	* config/arm/mve.md (*movmisalign<mode>_mve_store): New pattern.
	(*movmisalign<mode>_mve_load): New pattern.
	* config/arm/neon.md (movmisalign<mode>): Move to ...
	* config/arm/vec-common.md: ... here.

2021-01-12  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR target/97969
	* lra-eliminations.c (eliminate_regs_in_insn): Add transformation
	of pattern 'plus (plus (hard reg, const), pseudo)'.

2021-01-12  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98550
	* tree-vect-slp.c (vect_record_max_nunits): Check whether
	the group size is a multiple of the vector element count.
	(vect_build_slp_tree_1): When we need to fail because
	the vector type choosen causes unrolling do so lazily
	without affecting matches only at the end to guide group splitting.

2021-01-12  Martin Liska  <mliska@suse.cz>

	PR c++/97284
	* optc-save-gen.awk: Compare also n_target_save vars with
	strcmp.

2021-01-12  Martin Liska  <mliska@suse.cz>

	* gcov.c (source_info::debug): New.
	(print_usage): Add --debug (-D) option.
	(process_args): Likewise.
	(generate_results): Call src->debug after
	accumulate_line_counts.
	(read_graph_file): Properly assign id for EXIT_BLOCK.
	* profile.c (branch_prob): Dump function body before it is
	instrumented.

2021-01-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/98629
	* tree-ssa-math-opts.c (arith_overflow_check_p): Don't update use_stmt
	unless returning non-zero.

2021-01-12  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/95731
	* tree-ssa-reassoc.c (optimize_range_tests_cmp_bitwise): Also optimize
	x < 0 && y < 0 && z < 0 into (x | y | z) < 0 for signed x, y, z.
	(optimize_range_tests): Call optimize_range_tests_cmp_bitwise
	only after optimize_range_tests_var_bound.

2021-01-12  Jakub Jelinek  <jakub@redhat.com>

	* configure.ac: Ensure c/Make-lang.in comes first in @all_lang_makefrags@.
	* configure: Regenerated.

2021-01-12  liuhongt  <hongtao.liu@intel.com>

	PR target/98612
	* config/i386/i386-builtins.h (BUILTIN_DESC_SWAP_OPERANDS):
	Deleted.
	* config/i386/i386-expand.c (ix86_expand_sse_comi): Delete
	dead code.

2021-01-12  Alexandre Oliva  <oliva@adacore.com>

	* ssa-iterators.h (end_imm_use_stmt_traverse): Forward
	declare.
	(auto_end_imm_use_stmt_traverse): New struct.
	(FOR_EACH_IMM_USE_STMT): Use it.
	(BREAK_FROM_IMM_USE_STMT, RETURN_FROM_IMM_USE_STMT): Remove,
	along with uses...
	* gimple-ssa-strength-reduction.c: ... here, ...
	* graphite-scop-detection.c: ... here, ...
	* ipa-modref.c, ipa-pure-const.c, ipa-sra.c: ... here, ...
	* tree-predcom.c, tree-ssa-ccp.c: ... here, ...
	* tree-ssa-dce.c, tree-ssa-dse.c: ... here, ...
	* tree-ssa-loop-ivopts.c, tree-ssa-math-opts.c: ... here, ...
	* tree-ssa-phiprop.c, tree-ssa.c: ... here, ...
	* tree-vect-slp.c: ... and here, ...
	* doc/tree-ssa.texi: ... and the example here.

2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (sdiv_pow2<mode>3): Extend from
	SVE_FULL_I to SVE_I.  Generate an UNSPEC_PRED_X.
	(*sdiv_pow2<mode>3): New pattern.
	(@cond_<sve_int_op><mode>): Extend from SVE_FULL_I to SVE_I.
	Wrap the ASRD in an UNSPEC_PRED_X.
	(*cond_<sve_int_op><mode>_2): Likewise.  Replace the UNSPEC_PRED_X
	predicate with a constant PTRUE, if it isn't already.
	(*cond_<sve_int_op><mode>_z): Replace with...
	(*cond_<sve_int_op><mode>_any): ...this new pattern.

2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (*cond_bic<mode>_2): Extend from
	SVE_FULL_I to SVE_I.
	(*cond_bic<mode>_any): Likewise.

2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (<su>mul<mode>3_highpart)
	(@aarch64_pred_<MUL_HIGHPART:optab><mode>): Extend from SVE_FULL_I
	to SVE_I.

2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Extend from
	SVE_FULL_I to SVE_I.
	(*aarch64_cond_<su>abd<mode>_2): Likewise.
	(*aarch64_cond_<su>abd<mode>_any): Likewise.
	(@aarch64_pred_<su>abd<mode>): Likewise.  Use UNSPEC_PRED_X
	for the max and min but not for the minus.
	(*aarch64_cond_<su>abd<mode>_3): New pattern.

2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/iterators.md (SVE_24I): New iterator.
	* config/aarch64/aarch64-sve.md (*aarch64_adr<mode>_shift): Extend from
	SVE_FULL_SDI to SVE_24I.  Use containers rather than elements.

2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (@cond_<SVE_INT_BINARY:optab><mode>)
	(*cond_<SVE_INT_BINARY:optab><mode>_2): Extend from SVE_FULL_I
	to SVE_I.
	(*cond_<SVE_INT_BINARY:optab><mode>_3): Likewise.
	(*cond_<SVE_INT_BINARY:optab><mode>_any): Likewise.
	(*cond_<SVE_INT_BINARY:optab><mode>_2_const): Likewise.
	(*cond_<SVE_INT_BINARY:optab><mode>_any_const): Likewise.

2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (<SVE_INT_BINARY_IMM:optab><mode>3)
	(@aarch64_pred_<SVE_INT_BINARY_IMM:optab><mode>)
	(*post_ra_<SVE_INT_BINARY_IMM:optab><mode>3): Extend from SVE_FULL_I
	to SVE_I.

2021-01-11  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (<ASHIFT:optab><mode>3)
	(v<ASHIFT:optab><mode>3, @aarch64_pred_<optab><mode>)
	(*post_ra_v<ASHIFT:optab><mode>3): Extend from SVE_FULL_I to SVE_I.

2021-01-11  Martin Liska  <mliska@suse.cz>

	PR jit/98615
	* symtab-clones.h (clone_info::release): Release
	symtab::m_clones with ggc_delete as it's a GGC memory.

2021-01-11  Matthias Klose  <doko@ubuntu.com>

	* Makefile.in (LINK_PROGRESS): Show the link target.

2021-01-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/91403
	* tree-vect-data-refs.c (vect_analyze_group_access_1): Cap
	single-element interleaving group size at 4096 elements.

2021-01-11  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98526
	* tree-vect-loop.c (vect_model_reduction_cost): Remove costing
	of the actual reduction op for the regular case.
	(vectorizable_reduction): Cost the stmts
	vect_transform_reduction produces here.

2021-01-11  Andreas Krebbel  <krebbel@linux.ibm.com>

	* tree-ssa-forwprop.c (simplify_vector_constructor): For
	big-endian, use UNPACK[_FLOAT]_HI.

2021-01-11  Tamar Christina  <tamar.christina@arm.com>

	* tree-vect-slp-patterns.c (class complex_pattern,
	class complex_add_pattern): Add parameters to matches.
	(complex_add_pattern::build): Free memory.
	(complex_add_pattern::matches): Move validation end of match.
	(complex_add_pattern::recognize): Likewise.

2021-01-11  Tamar Christina  <tamar.christina@arm.com>

	* tree-vect-slp-patterns.c (linear_loads_p): Fix externals.

2021-01-11  Tamar Christina  <tamar.christina@arm.com>

	* tree-vect-slp-patterns.c (is_linear_load_p): Fix ambiguity.

2021-01-11  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/95867
	* tree-ssa-math-opts.h: New header.
	* tree-ssa-math-opts.c: Include tree-ssa-math-opts.h.
	(powi_as_mults): No longer static.  Use build_one_cst instead of
	build_real.  Formatting fix.
	* tree-ssa-reassoc.c: Include tree-ssa-math-opts.h.
	(attempt_builtin_powi): Handle multiplication reassociation without
	powi_fndecl using powi_as_mults.
	(reassociate_bb): For integral types don't require
	-funsafe-math-optimizations to call attempt_builtin_powi.

2021-01-11  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/95852
	* tree-ssa-math-opts.c (maybe_optimize_guarding_check): Change
	mul_stmts parameter type to vec<gimple *> &.  Before cond_stmt
	allow in the bb any of the stmts in that vector, div_stmt and
	up to 3 cast stmts.
	(arith_cast_equal_p): New function.
	(arith_overflow_check_p): Add cast_stmt argument, handle signed
	multiply overflow checks.
	(match_arith_overflow): Adjust caller.  Handle signed multiply
	overflow checks.

2021-01-11  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/95852
	* tree-ssa-math-opts.c (maybe_optimize_guarding_check): New function.
	(uaddsub_overflow_check_p): Renamed to ...
	(arith_overflow_check_p): ... this.  Handle also multiplication
	with overflow check.
	(match_uaddsub_overflow): Renamed to ...
	(match_arith_overflow): ... this.  Add cfg_changed argument.  Handle
	also multiplication with overflow check.  Adjust function comment.
	(math_opts_dom_walker::after_dom_children): Adjust callers.  Call
	match_arith_overflow also for MULT_EXPR.

2021-01-11  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/arm_neon.h (vmovl_s8): Reimplement using
	__builtin_convertvector.
	(vmovl_s16): Likewise.
	(vmovl_s32): Likewise.
	(vmovl_u8): Likewise.
	(vmovl_u16): Likewise.
	(vmovl_u32): Likewise.
	(vmovn_s16): Likewise.
	(vmovn_s32): Likewise.
	(vmovn_s64): Likewise.
	(vmovn_u16): Likewise.
	(vmovn_u32): Likewise.
	(vmovn_u64): Likewise.

2021-01-11  Martin Liska  <mliska@suse.cz>

	* gimple-if-to-switch.cc (struct condition_info): Use auto_var.
	(if_chain::is_beneficial): Delete clusters
	(find_conditions): Make second argument of conditions_in_bbs a
	pointer so that we control over it's lifetime.
	(pass_if_to_switch::execute): Delete them.

2021-01-11  Kewen Lin  <linkw@linux.ibm.com>

	* ira.c (move_unallocated_pseudos): Check other_reg and skip if
	it isn't set.

2021-01-09  Maciej W. Rozycki  <macro@linux-mips.org>

	* config/vax/vax.md (cc): Remove mode attribute.
	(subst_<cc>, subst_f<cc>): Rename to...
	(subst_<mode>, subst_f<VAXccnz:mode>): ... these respectively.
	(*cbranch<VAXint:mode>4_<VAXcc:mode>): Update for `cc' removal.
	(*cbranch<VAXfp:mode>4_<VAXccnz:mode>): Likewise.
	(*branch_<mode>, *branch_<mode>_reversed): Likewise.

2021-01-09  Maciej W. Rozycki  <macro@linux-mips.org>

	* config/vax/vax.md (subst_f<cc>): Add mode to operands and
	`const_double_zero'.

2021-01-09  Maciej W. Rozycki  <macro@linux-mips.org>

	* config/pdp11/pdp11.md (PDPfp): New mode iterator.
	(fcc_cc, fcc_ccnz): Use it.  Add mode to `const_double_zero' and
	operands.

2021-01-09  Maciej W. Rozycki  <macro@linux-mips.org>

	* genemit.c (gen_exp) <CONST_DOUBLE>: Handle `const_double_zero'
	rtx.
	* read-rtl.c (rtx_reader::read_rtx_code): Handle machine mode
	with `const_double_zero'.
	* doc/rtl.texi (Constant Expression Types): Document it.

2021-01-09  Jakub Jelinek  <jakub@redhat.com>

	PR c++/98556
	* tree-cfg.c (verify_gimple_assign_binary): Allow lhs of
	POINTER_DIFF_EXPR to be any integral type.

2021-01-09  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/98603
	* function.c (instantiate_virtual_regs_in_insn): For asm goto
	with impossible constraints, drop all SETs, CLOBBERs, drop PARALLEL
	if any, set ASM_OPERANDS mode to VOIDmode and change
	ASM_OPERANDS_OUTPUT_CONSTRAINT and ASM_OPERANDS_OUTPUT_IDX.

2021-01-09  Alexandre Oliva  <oliva@gnu.org>

	PR debug/97714
	* final.c (notice_source_line): Narrow down the condition to
	skip a line-0 marker.

2021-01-08  Sergei Trofimovich  <siarheit@google.com>

	* ipa-modref.c (merge_call_side_effects): Fix
	linebreak split by reordering two print calls.

2021-01-08  Ilya Leoshkevich  <iii@linux.ibm.com>

	* config/s390/vector.md (*tf_to_fprx2_0): Rename from
	"*mov_tf_to_fprx2_0" for consistency, fix constraint.
	(*tf_to_fprx2_1): Rename from "*mov_tf_to_fprx2_1" for
	consistency, fix constraint.

2021-01-08  Ilya Leoshkevich  <iii@linux.ibm.com>

	* config/s390/s390-c.c (s390_def_or_undef_macro): Accept
	callables instead of mask values.
	(struct target_flag_set_p): New predicate.
	(s390_cpu_cpp_builtins_internal): Define or undefine
	__LONG_DOUBLE_VX__ macro.

2021-01-08  H.J. Lu  <hjl.tools@gmail.com>

	PR target/98482
	* config/i386/i386.c (x86_function_profiler): Use R10 and R11
	to call mcount in large model with PIC for NO_PROFILE_COUNTERS
	targets.

2021-01-08  Richard Biener  <rguenther@suse.de>

	* tree-ssa-sccvn.c (pass_fre::execute): Reset the SCEV hash table.

2021-01-08  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.c (scalar_stmts_to_slp_tree_map_t): Fix.
	(vect_build_slp_tree): On cache hit release the matched
	scalar stmts vector.
	* tree-vect-stmts.c (vectorizable_store): Properly free
	vec_oprnds before possibly gathering them again.

2021-01-08  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98544
	* tree-vect-slp.c (vect_optimize_slp): Always materialize
	permutes at a permute node.

2021-01-08  H.J. Lu  <hjl.tools@gmail.com>

	PR target/98482
	* config/i386/i386.c (x86_function_profiler): Use R10 to call
	mcount in large model.  Sorry for large model with PIC.

2021-01-08  Jakub Jelinek  <jakub@redhat.com>

	PR target/98585
	* config/i386/i386.opt (ix86_cmodel, ix86_incoming_stack_boundary_arg,
	ix86_pmode, ix86_preferred_stack_boundary_arg, ix86_regparm,
	ix86_veclibabi_type): Remove x_ prefix, use TargetVariable instead of
	TargetSave and initialize for variables with enum types.
	(mfentry, mstack-protector-guard-reg=, mstack-protector-guard-offset=,
	mstack-protector-guard-symbol=): Add Save.
	* config/i386/i386-options.c (ix86_function_specific_save,
	ix86_function_specific_restore): Don't save or restore x_ix86_cmodel,
	x_ix86_incoming_stack_boundary_arg, x_ix86_pmode,
	x_ix86_preferred_stack_boundary_arg, x_ix86_regparm,
	x_ix86_veclibabi_type.

2021-01-08  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (*cnot<mode>): Extend from
	SVE_FULL_I to SVE_I.
	(*cond_cnot<mode>_2, *cond_cnot<mode>_any): Likewise.

2021-01-08  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (*cond_uxt<mode>_2): Extend from
	SVE_FULL_I to SVE_I.
	(*cond_uxt<mode>_any): Likewise.

2021-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/iterators.md (Vwhalf): New iterator.
	* config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>_3):
	Rename to...
	(aarch64_<sur>adalp<mode>): ... This.  Make more
	builtin-friendly.
	(<sur>sadv16qi): Adjust callsite of the above.
	* config/aarch64/aarch64-simd-builtins.def (sadalp, uadalp): New
	builtins.
	* config/aarch64/arm_neon.h (vpadal_s8): Reimplement using
	builtins.
	(vpadal_s16): Likewise.
	(vpadal_u8): Likewise.
	(vpadal_u16): Likewise.
	(vpadalq_s8): Likewise.
	(vpadalq_s16): Likewise.
	(vpadalq_s32): Likewise.
	(vpadalq_u8): Likewise.
	(vpadalq_u16): Likewise.
	(vpadalq_u32): Likewise.

2021-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>_3):
	Rename to...
	(aarch64_<su>abd<mode>): ... This.
	(<sur>sadv16qi): Adjust callsite of the above.
	* config/aarch64/aarch64-simd-builtins.def (sabd, uabd): Define
	builtins.
	* config/aarch64/arm_neon.h (vabd_s8): Reimplement using
	builtin.
	(vabd_s16): Likewise.
	(vabd_s32): Likewise.
	(vabd_u8): Likewise.
	(vabd_u16): Likewise.
	(vabd_u32): Likewise.
	(vabdq_s8): Likewise.
	(vabdq_s16): Likewise.
	(vabdq_s32): Likewise.
	(vabdq_u8): Likewise.
	(vabdq_u16): Likewise.
	(vabdq_u32): Likewise.

2021-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd-builtins.def (saba, uaba): Define
	builtins.
	* config/aarch64/arm_neon.h (vaba_s8): Implement using builtin.
	(vaba_s16): Likewise.
	(vaba_s32): Likewise.
	(vaba_u8): Likewise.
	(vaba_u16): Likewise.
	(vaba_u32): Likewise.
	(vabaq_s8): Likewise.
	(vabaq_s16): Likewise.
	(vabaq_s32): Likewise.
	(vabaq_u8): Likewise.
	(vabaq_u16): Likewise.
	(vabaq_u32): Likewise.

2021-01-08  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

	* config/aarch64/aarch64-simd.md (aba<mode>_3): Rename to...
	(aarch64_<su>aba<mode>): ... This.  Handle uaba as well.
	Change RTL pattern to match.

2021-01-08  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.c (riscv_current_subset_list): New.
	* config/riscv/riscv-c.c (riscv-subset.h): New.
	(INCLUDE_STRING): Define.
	(riscv_cpu_cpp_builtins): Add new style architecture extension
	test macros.
	* config/riscv/riscv-subset.h (riscv_subset_list::begin): New.
	(riscv_subset_list::end): New.
	(riscv_current_subset_list): New.

2021-01-08  Kito Cheng  <kito.cheng@sifive.com>

	* common/config/riscv/riscv-common.c (RISCV_DONT_CARE_VERSION):
	Move to riscv-subset.h.
	(struct riscv_subset_t): Ditto.
	(class riscv_subset_list): Ditto.
	* config/riscv/riscv-subset.h (RISCV_DONT_CARE_VERSION): Move
	from riscv-common.c.
	(struct riscv_subset_t): Ditto.
	(class riscv_subset_list): Ditto.
	* config/riscv/t-riscv ($(common_out_file)): Add file
	dependency.

2021-01-07  Jakub Jelinek  <jakub@redhat.com>

	PR target/98567
	* config/i386/i386.md (*bmi_blsi_<mode>_cmp, *bmi_blsi_<mode>_ccno):
	New define_insn patterns.

2021-01-07  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64-sve.md (@cond_<SVE_INT_UNARY:optab><mode>)
	(*cond_<SVE_INT_UNARY:optab><mode>_2): Extend from SVE_FULL_I to SVE_I.
	(*cond_<SVE_INT_UNARY:optab><mode>_any): Likewise.

2021-01-07  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/98560
	* internal-fn.def (IFN_VCONDU, IFN_VCONDEQ): Use type vec_cond.
	* internal-fn.c (vec_cond_mask_direct): Get the data mode from
	argument 1.
	(vec_cond_direct): Likewise argument 2.
	(vec_condu_direct, vec_condeq_direct): Delete.
	(expand_vect_cond_optab_fn): Rename to...
	(expand_vec_cond_optab_fn): ...this, replacing old macro.
	(expand_vec_condu_optab_fn, expand_vec_condeq_optab_fn): Delete.
	(expand_vect_cond_mask_optab_fn): Rename to...
	(expand_vec_cond_mask_optab_fn): ...this, replacing old macro.
	(direct_vec_cond_mask_optab_supported_p): Treat the optab as a
	convert optab.
	(direct_vec_cond_optab_supported_p): Likewise.
	(direct_vec_condu_optab_supported_p): Delete.
	(direct_vec_condeq_optab_supported_p): Delete.
	* gimple-isel.cc: Include internal-fn.h.
	(gimple_expand_vec_cond_expr): Check that IFN_VCONDEQ is supported
	before using it.

2021-01-07  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/98560
	* gimple-isel.cc (gimple_expand_vec_cond_expr): If we fail to use
	IFN_VCOND{,U,EQ}, fall back on IFN_VCOND_MASK.

2021-01-07  Uroš Bizjak  <ubizjak@gmail.com>

	* config/i386/i386.md (insn): Merge from plusminus_insn, shift_insn,
	rotate_insn and optab code attributes.
	Update all uses to merged code attribute.
	* config/i386/sse.md: Update all uses to merged code attribute.
	* config/i386/mmx.md: Update all uses to merged code attribute.

2021-01-07  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/98568
	* gimple-ssa-store-merging.c (bswap_view_convert): New function.
	(bswap_replace): Use it.

2021-01-06  Vladimir N. Makarov  <vmakarov@redhat.com>

	PR rtl-optimization/97978
	* lra-int.h (lra_hard_reg_split_p): New external.
	* lra.c (lra_hard_reg_split_p): New global.
	(lra): Set up lra_hard_reg_split_p after splitting a hard reg.
	* lra-assigns.c (lra_assign): Don't check allocation correctness
	after hard reg splitting.

2021-01-06  Martin Sebor  <msebor@redhat.com>

	PR c++/98305
	* builtins.c (new_delete_mismatch_p): New overload.
	(new_delete_mismatch_p (tree, tree)): Call it.

2021-01-06  Alexandre Oliva  <oliva@adacore.com>

	* Makefile.in (T_GLIMITS_H): New.
	(stmp-int-hdrs): Depend on it, use it.
	* config/t-vxworks (T_GLIMITS_H): Override it.
	(vxw-glimits.h): New.

2021-01-06  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98513
	* value-range.cc (intersect_ranges): Compare the upper bounds
	for the expected relation.

2021-01-06  Gerald Pfeifer  <gerald@pfeifer.com>

	Revert:
	2020-12-28  Gerald Pfeifer  <gerald@pfeifer.com>

	* doc/standards.texi (HSAIL): Remove section.

2021-01-05  Samuel Thibault  <samuel.thibault@ens-lyon.org>

	* configure: Re-generate.

2021-01-05  Jakub Jelinek  <jakub@redhat.com>

	* doc/invoke.texi (-std=c++20): Adjust for the publication of
	ISO 14882:2020 standard.
	* doc/standards.texi: Likewise.

2021-01-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/94802
	* expr.h (maybe_optimize_sub_cmp_0): Declare.
	* expr.c: Include tree-pretty-print.h and flags.h.
	(maybe_optimize_sub_cmp_0): New function.
	(do_store_flag): Use it.
	* cfgexpand.c (expand_gimple_cond): Likewise.

2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>

	* mux-utils.h (pointer_mux::m_ptr): Tweak description of contents.
	* rtlanal.c (simple_regno_set): Tweak description to clarify the
	RMW condition.

2021-01-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98516
	* tree-vect-slp.c (vect_optimize_slp): Permute the incoming
	lanes when materializing on a VEC_PERM node.
	(vectorizable_slp_permutation): Dump the permute properly.

2021-01-05  Richard Biener  <rguenther@suse.de>

	* tree-vect-slp.c (vect_slp_region): Move debug counter
	to cover individual subgraphs.

2021-01-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98428
	* tree-vect-slp.c (vect_build_slp_tree_1): Properly reject
	vector lane extracts for loop vectorization.

2021-01-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/98514
	* tree-ssa-reassoc.c (bb_rank): Change type from long * to
	int64_t *.
	(operand_rank): Change type from hash_map<tree, long> to
	hash_map<tree, int64_t>.
	(phi_rank): Change return type from long to int64_t.
	(loop_carried_phi): Change block_rank variable type from long to
	int64_t.
	(propagate_rank): Change return type, rank parameter type and
	op_rank variable type from long to int64_t.
	(find_operand_rank): Change return type from long to int64_t
	and change slot variable type from long * to int64_t *.
	(insert_operand_rank): Change rank parameter type from long to
	int64_t.
	(get_rank): Change return type and rank variable type from long to
	int64_t.  Use PRId64 instead of ld to print the rank.
	(init_reassoc): Change rank variable type from long to int64_t
	and adjust correspondingly bb_rank and operand_rank initialization.

2021-01-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/96928
	* tree-ssa-phiopt.c (xor_replacement): New function.
	(tree_ssa_phiopt_worker): Call it.

2021-01-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/96930
	* match.pd ((A / (1 << B)) -> (A >> B)): If A is extended
	from narrower value which has the same type as 1 << B, perform
	the right shift on the narrower value followed by extension.

2021-01-05  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/96239
	* gimple-ssa-store-merging.c (maybe_optimize_vector_constructor): New
	function.
	(get_status_for_store_merging): Don't return BB_INVALID for blocks
	with potential bswap optimizable CONSTRUCTORs.
	(pass_store_merging::execute): Optimize vector CONSTRUCTORs with bswap
	if possible.

2021-01-05  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98381
	* tree.c (vector_element_bits): Properly compute bool vector
	element size.
	* tree-vect-loop.c (vectorizable_live_operation): Properly
	compute the last lane bit offset.

2021-01-05  Uroš Bizjak  <ubizjak@gmail.com>

	PR target/98522
	* config/i386/sse.md (sse_cvtps2pi): Redefine as define_insn_and_split.
	Clear the top 64 bytes of the input XMM register.
	(sse_cvttps2pi): Ditto.

2021-01-05  Uroš Bizjak  <ubizjak@gmail.com>

	PR target/98521
	* config/i386/xopintrin.h (_mm256_cmov_si256): New.

2021-01-05  H.J. Lu  <hjl.tools@gmail.com>

	PR target/98495
	* config/i386/xmmintrin.h (_mm_extract_pi16): Cast to unsigned
	short first.

2021-01-05  Claudiu Zissulescu  <claziss@synopsys.com>

	* config/arc/arc.md (maddsidi4_split): Use ACC_REG_FIRST.
	(umaddsidi4_split): Likewise.

2021-01-05  liuhongt  <hongtao.liu@intel.com>

	PR target/98461
	* config/i386/sse.md (*sse2_pmovskb_zexthisi): New
	define_insn_and_split for zero_extend of subreg HI of pmovskb
	result.
	(*sse2_pmovskb_zexthisi): Add new combine splitters for
	zero_extend of not of subreg HI of pmovskb result.

2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/97269
	* explow.c (convert_memory_address_addr_space_1): Handle UNSPECs
	nested in CONSTs.
	* config/aarch64/aarch64.c (aarch64_expand_mov_immediate): Use
	convert_memory_address to convert symbolic immediates to ptr_mode
	before forcing them to memory.

2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/97144
	* recog.c (constrain_operands): Initialize matching_operand
	for each alternative, rather than only doing it once.

2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>

	PR rtl-optimization/98403
	* rtl-ssa/changes.cc (function_info::finalize_new_accesses): Explain
	why we don't remove call clobbers.
	(function_info::apply_changes_to_insn): Don't attempt to add
	call clobbers here.

2021-01-05  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/98371
	* tree-vect-loop.c (vect_reanalyze_as_main_loop): New function.
	(vect_analyze_loop): If an epilogue loop appears to be cheaper
	than the main loop, re-analyze it as a main loop before adopting
	it as a main loop.

2021-01-05  Rainer Orth  <ro@CeBiTec.Uni-Bielefeld.DE>

	PR c++/98316
	* configure.ac (NETLIBS): Determine using AX_LIB_SOCKET_NSL.
	* aclocal.m4, configure: Regenerate.
	* Makefile.in (NETLIBS): Define.
	(BACKEND): Remove $(CODYLIB).

2021-01-05  Jakub Jelinek  <jakub@redhat.com>

	PR rtl-optimization/98334
	* simplify-rtx.c (simplify_context::simplify_binary_operation_1):
	Optimize (X - 1) * Y + Y to X * Y or (X + 1) * Y - Y to X * Y.

2021-01-05  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	* tree-inline.c (expand_call_inline): Restore input_location.
	Return result from recursive call.

2021-01-04  Richard Sandiford  <richard.sandiford@arm.com>

	PR tree-optimization/95401
	* config/aarch64/aarch64-sve-builtins.cc
	(gimple_folder::load_store_cookie): Use bits rather than bytes
	for the alignment argument to IFN_MASK_LOAD and IFN_MASK_STORE.
	* gimple-fold.c (gimple_fold_mask_load_store_mem_ref): Likewise.
	* tree-vect-stmts.c (vectorizable_store): Likewise.
	(vectorizable_load): Likewise.

2021-01-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98308
	* tree-vect-stmts.c (vectorizable_load): Set invariant mask
	SLP vectype.

2021-01-04  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/95771
	* tree-ssa-loop-niter.c (number_of_iterations_popcount): Handle types
	with precision smaller than int's precision and types with precision
	twice as large as long long.  Formatting fixes.

2021-01-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98464
	* tree-ssa-sccvn.c (vn_valueize_for_srt): Rename from ...
	(vn_valueize_wrapper): ... this.  Temporarily adjust vn_context_bb.
	(process_bb): Adjust.

2021-01-04  Matthew Malcomson  <matthew.malcomson@arm.com>

	PR other/98437
	* doc/invoke.texi (-fsanitize=address): Fix wording describing
	clash with -fsanitize=hwaddress.

2021-01-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98282
	* tree-ssa-sccvn.c (vn_get_stmt_kind): Classify tcc_reference on
	invariants as VN_NARY.

2021-01-04  Richard Sandiford  <richard.sandiford@arm.com>

	PR target/89057
	* config/aarch64/aarch64-simd.md (aarch64_combine<mode>): Accept
	aarch64_simd_reg_or_zero for operand 2.  Use the combinez patterns
	to handle zero operands.

2021-01-04  Richard Sandiford  <richard.sandiford@arm.com>

	* config/aarch64/aarch64.c (offset_6bit_signed_scaled_p): New function.
	(offset_6bit_unsigned_scaled_p): Fix typo in comment.
	(aarch64_sve_prefetch_operand_p): Accept MUL VLs in the range
	[-32, 31].

2021-01-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98393
	* tree-vect-slp.c (vect_build_slp_tree): Properly zero matches
	when hitting the limit.

2021-01-04  Richard Biener  <rguenther@suse.de>

	PR tree-optimization/98291
	* tree-vect-loop.c (vectorizable_reduction): Bypass
	associativity check for SLP reductions with VF 1.

2021-01-04  Jakub Jelinek  <jakub@redhat.com>

	PR tree-optimization/96782
	* match.pd (x == ~x -> false, x != ~x -> true): New simplifications.

2021-01-04  Bernd Edlinger  <bernd.edlinger@hotmail.de>

	* collect-utils.c (collect_execute): Check dumppfx.
	* collect2.c (maybe_run_lto_and_relink, do_link): Pass atsuffix
	to collect_execute.
	(do_link): Add new parameter atsuffix.
	(main): Handle -dumpdir option.  Skip one argument for
	-o, -isystem and -B options.
	* gcc.c (make_at_file): New helper function.
	(close_at_file): Use it.

2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.h (MIN_LD64_NO_COAL_SECTS): Adjust.
	Amend handling for LD64_VERSION fallback defaults.

2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>

	* config.gcc: Compute default version information
	from the configured target.  Likewise defaults for
	ld64.
	* config/darwin10.h: Removed.
	* config/darwin12.h: Removed.
	* config/darwin9.h: Removed.
	* config/rs6000/darwin8.h: Removed.

2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin9.h (ASM_OUTPUT_ALIGNED_COMMON): Delete.

2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin9.h (STACK_CHECK_STATIC_BUILTIN): Move from here..
	* config/darwin.h (STACK_CHECK_STATIC_BUILTIN): .. to here.

2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move from
	here...
	* config/darwin.h (LINK_GCC_C_SEQUENCE_SPEC): ... to here.

2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin10.h (LINK_GCC_C_SEQUENCE_SPEC): Move the spec
	for the Darwin10 unwinder stub from here ...
	* config/darwin.h (LINK_COMMAND_SPEC_A): ... to here.

2021-01-02  Iain Sandoe  <iain@sandoe.co.uk>

	* config/darwin.h (DSYMUTIL_SPEC): Default to DWARF
	(ASM_DEBUG_SPEC):Only define if the assembler supports
	stabs.
	(PREFERRED_DEBUGGING_TYPE): Default to DWARF.
	(DARWIN_PREFER_DWARF): Define.
	* config/darwin9.h (PREFERRED_DEBUGGING_TYPE): Remove.
	(DARWIN_PREFER_DWARF): Likewise
	(DSYMUTIL_SPEC): Likewise.
	(COLLECT_RUN_DSYMUTIL): Likewise.
	(ASM_DEBUG_SPEC): Likewise.
	(ASM_DEBUG_OPTION_SPEC): Likewise.

2021-01-02  Jan Hubicka  <jh@suse.cz>

	* cfg.c (free_block): ggc_free bb.

2021-01-01  Jakub Jelinek  <jakub@redhat.com>

	* gcc.c (process_command): Update copyright notice dates.
	* gcov-dump.c (print_version): Ditto.
	* gcov.c (print_version): Ditto.
	* gcov-tool.c (print_version): Ditto.
	* gengtype.c (create_file): Ditto.
	* doc/cpp.texi: Bump @copying's copyright year.
	* doc/cppinternals.texi: Ditto.
	* doc/gcc.texi: Ditto.
	* doc/gccint.texi: Ditto.
	* doc/gcov.texi: Ditto.
	* doc/install.texi: Ditto.
	* doc/invoke.texi: Ditto.

2021-01-01  Jakub Jelinek  <jakub@redhat.com>

	* ChangeLog-2020: Rotate ChangeLog.  New file.


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