head 1.1; branch 1.1.1; access ; symbols noReleaseTag:1.1.1.1 noVendorName:1.1.1; locks ; strict; comment @# @; 1.1 date 2003.02.10.04.04.54; author doru; state Exp; branches 1.1.1.1; next ; 1.1.1.1 date 2003.02.10.04.04.54; author doru; state Exp; branches ; next ; desc @@ 1.1 log @Initial revision @ text @ Bypass chain 1 Main Page Modules Related Pages

Bypass chain 1
[Bypass Unit]

Bypass chain 1 (BPR1) write port connectivity

Requests to BPR1 write port

pavr_s5_alu_bpr1wr_rq
Need by regular ALU instructions that have a 16 bit result (ADIW, SBIW, MUL, MULS, MULSU, FMUL, FMULS, FMULSU, MOVW).
pavr_s5_dacux_bpr12wr_rq
Needed by loads and stores with pre(post) decrement(increment).
Lower byte of X pointer will be written into BPR1.
pavr_s5_dacuy_bpr12wr_rq
Needed by loads and stores with pre(post) decrement(increment).
Lower byte of Y pointer will be written into BPR1.
pavr_s5_dacuz_bpr12wr_rq
Needed by loads and stores with pre(post) decrement(increment).
Lower byte of Z pointer will be written into BPR1.

Generated on Tue Dec 31 20:26:30 2002 for Pipelined AVR microcontroller by

1.2.16

@ 1.1.1.1 log @Importing into repository the new directory structure. @ text @@

Bypass chain 1 [Bypass Unit]

Bypass chain 1
[Bypass Unit]