head 1.1; access; symbols; locks; strict; comment @# @; 1.1 date 2008.03.06.13.47.21; author des00; state Exp; branches; next ; commitid 73fe47cff5e54567; desc @@ 1.1 log @initial file import @ text @Logical project decsription core - external not under development IP cores doc - project documentation include - common rtl, testbench header files rtl - rtl models of project units sim - simulation scripts for verivication testbench - verification enviroment for project @