head 1.2;
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initial:1.1.1.1 diogenes:1.1.1;
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comment @# @;
1.2
date 2008.02.04.17.56.20; author fellnhofer; state dead;
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commitid 10d747a751a24567;
1.1
date 2008.01.16.19.01.32; author fellnhofer; state Exp;
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1.1.1.1;
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commitid e9847a74fd04567;
1.1.1.1
date 2008.01.16.19.01.32; author fellnhofer; state Exp;
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1.2
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Xilinx Design Summary
RS232 Project Status |
Project File: |
rs232.ise |
Current State: |
New |
Module Name: |
sc_uart |
|
|
Target Device: |
xc3s500e-5fg320 |
|
|
Product Version: |
ISE 9.1i |
|
So 11. Nov 12:36:46 2007 |
RS232 Partition Summary |
No partition information was found. |
Detailed Reports |
Report Name | Status | Generated |
Errors | Warnings | Infos |
Synthesis Report | | | | | |
Translation Report | | | | | |
Map Report | | | | | |
Place and Route Report | | | | | |
Static Timing Report | | | | | |
Bitgen Report | | | | | |
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1.1
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@Initial revision
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1.1.1.1
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initial import
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